From: Mark Brown <broonie@kernel.org>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip
Date: Fri, 4 Jun 2021 12:53:39 +0100 [thread overview]
Message-ID: <20210604115339.GC4045@sirena.org.uk> (raw)
In-Reply-To: <YLoOSMxeGXP07Tfw@lahna.fi.intel.com>
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On Fri, Jun 04, 2021 at 02:28:08PM +0300, Mika Westerberg wrote:
> Yes, exactly. With ACPI/DT the SPI core handles this after the SPI
> master device is registered and that would result spi_nor_probe() to be
> called for the children. However, with this one there is no ACPI node
> for the controller (it is PCI enumerated) so there would need to be some
> way to create that child device. In the old days that would be "platform
> data" but that's pretty much frowned upon these days ;-)
No, that's totally fine and normal - it's just like probing a MFD, we do
it all the time for child devices.
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next prev parent reply other threads:[~2021-06-04 11:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210525160318.35802-1-mika.westerberg@linux.intel.com>
[not found] ` <20210525191414.dc45h27rzqen4dce@ti.com>
[not found] ` <20210526091250.GY291593@lahna.fi.intel.com>
[not found] ` <20210526092417.GA291593@lahna.fi.intel.com>
[not found] ` <e82f44552d0d4284fc5ed22ee0bee85a@walle.cc>
[not found] ` <20210526102810.GB291593@lahna.fi.intel.com>
[not found] ` <YLTILUh+bPhZ4ToR@lahna.fi.intel.com>
[not found] ` <YLi3/DRqGzdlosNf@lahna.fi.intel.com>
2021-06-03 18:08 ` [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip Pratyush Yadav
2021-06-04 11:28 ` Mika Westerberg
2021-06-04 11:53 ` Mark Brown [this message]
2021-06-04 14:10 ` Mika Westerberg
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