From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
<linux-mtd@lists.infradead.org>, Mark Brown <broonie@kernel.org>,
<linux-spi@vger.kernel.org>, Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Subject: Re: [PATCH v5 12/13] spi: mxic: Use spi_mem_generic_supports_op()
Date: Wed, 15 Dec 2021 18:44:26 +0100 [thread overview]
Message-ID: <20211215184426.67fd3912@xps13> (raw)
In-Reply-To: <20211214172410.2b26c17e@collabora.com>
Hi Boris,
boris.brezillon@collabora.com wrote on Tue, 14 Dec 2021 17:24:10 +0100:
> On Tue, 14 Dec 2021 12:41:39 +0100
> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> > This driver can be simplified a little bit by using
> > spi_mem_generic_supports_op() instead of the
> > spi_mem_default/dtr_supports_op() couple. The all_false boolean is
> > inverted to become a dtr boolean, which checks if at least one of the
> > operation member uses dtr mode. The idea behind this change is to
> > simplify the introduction of the pipelined ECC engine.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/spi/spi-mxic.c | 10 +++-------
> > 1 file changed, 3 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
> > index 485a7f2afb44..5e71aa630504 100644
> > --- a/drivers/spi/spi-mxic.c
> > +++ b/drivers/spi/spi-mxic.c
> > @@ -452,7 +452,7 @@ static ssize_t mxic_spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
> > static bool mxic_spi_mem_supports_op(struct spi_mem *mem,
> > const struct spi_mem_op *op)
> > {
> > - bool all_false;
> > + struct spi_mem_controller_caps caps = {};
> >
> > if (op->data.buswidth > 8 || op->addr.buswidth > 8 ||
> > op->dummy.buswidth > 8 || op->cmd.buswidth > 8)
> > @@ -465,13 +465,9 @@ static bool mxic_spi_mem_supports_op(struct spi_mem *mem,
> > if (op->addr.nbytes > 7)
> > return false;
> >
> > - all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
> > - !op->data.dtr;
> > + caps.dtr = op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
>
> Are you sure that's what you want to do? spi_mem_controller_caps is
> supposed to encode the controller capabilities, not whether the
> operation contains a DTR cycle or not. I'd expect this caps object to be
> statically defined, with possibly one instance per-compat if the caps
> depend on the HW revision.
In order to keep the series easy to review I decided to go for the
following approach:
* Introduce the spi_mem_generic_supports_op_helper() which takes a
capabilities structure. This helper gathers all the checks from
spi_mem_default_supports_op() and spi_mem_dtr_supports_op(). These
two helpers now call the new one with either a NULL pointer in the
former case, or a structure with the .dtr parameter set to true in
the latter.
* Change the API of spi_mem_default_supports_op(), this involves
updating many different drivers so this change does only that in a
very transparent way, with no functional changes at all. All the
drivers provide a NULL parameter for the capabilities structure.
* Actually make use of the new parameter of
spi_mem_default_supports_op() in the drivers Cadence and Macronix,
which do have DTR support. This kills the spi_mem_dtr_supports_op()
helper.
* Kill the temporary spi_mem_generic_supports_op() helper by moving
all the logic back into spi_mem_default_supports_op().
This approach is really straightforward and easily bisectable if
needed. While working on this, I fixed the check we discussed on IRC
about the command parameter when in a DTR operation. I also reverted
the logic in the various checks, as you suggested.
Thanks,
Miquèl
next prev parent reply other threads:[~2021-12-15 17:44 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-14 11:41 [PATCH v5 00/13] Pipelined ECC engines & Macronix support Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 01/13] mtd: nand: ecc: Provide a helper to retrieve a pilelined engine device Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 02/13] mtd: nand: mxic-ecc: Support SPI pipelined mode Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 03/13] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 04/13] spi: spi-mem: Create a helper to gather all the supports_op checks Miquel Raynal
2021-12-14 19:53 ` Pratyush Yadav
2021-12-15 16:11 ` Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 05/13] spi: spi-mem: Export the spi_mem_generic_supports_op() helper Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 06/13] spi: spi-mem: Add an ecc_en parameter to the spi_mem_op structure Miquel Raynal
2021-12-14 16:29 ` Boris Brezillon
2021-12-14 11:41 ` [PATCH v5 07/13] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 08/13] spi: mxic: Fix the transmit path Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 09/13] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 10/13] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 11/13] spi: mxic: Add support for direct mapping Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 12/13] spi: mxic: Use spi_mem_generic_supports_op() Miquel Raynal
2021-12-14 16:24 ` Boris Brezillon
2021-12-15 17:44 ` Miquel Raynal [this message]
2021-12-15 18:45 ` Boris Brezillon
2021-12-16 8:11 ` Miquel Raynal
2021-12-15 18:52 ` Boris Brezillon
2021-12-16 8:14 ` Miquel Raynal
2021-12-15 19:05 ` Boris Brezillon
2021-12-15 19:19 ` Mark Brown
2021-12-16 8:07 ` Miquel Raynal
2021-12-16 9:01 ` Miquel Raynal
2021-12-16 9:57 ` Miquel Raynal
2021-12-16 14:04 ` Mark Brown
2021-12-16 14:27 ` Miquel Raynal
2021-12-14 11:41 ` [PATCH v5 13/13] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211215184426.67fd3912@xps13 \
--to=miquel.raynal@bootlin.com \
--cc=Tudor.Ambarus@microchip.com \
--cc=boris.brezillon@collabora.com \
--cc=broonie@kernel.org \
--cc=jaimeliao@mxic.com.tw \
--cc=juliensu@mxic.com.tw \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=michael@walle.cc \
--cc=p.yadav@ti.com \
--cc=richard@nod.at \
--cc=thomas.petazzoni@bootlin.com \
--cc=vigneshr@ti.com \
--cc=xiangsheng.hou@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).