From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Pratyush Yadav <p.yadav@ti.com>
Cc: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>,
Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Boris Brezillon <boris.brezillon@collabora.com>
Subject: Re: [PATCH v7 04/14] spi: cadence: Provide a capability structure
Date: Tue, 21 Dec 2021 11:16:20 +0100 [thread overview]
Message-ID: <20211221111605.352285f5@xps13> (raw)
In-Reply-To: <20211220185515.wujhgn66mnwns7bw@ti.com>
Hi Pratyush,
p.yadav@ti.com wrote on Tue, 21 Dec 2021 00:25:18 +0530:
> > Subject: [PATCH v7 04/14] spi: cadence: Provide a capability structure
>
> s/cadence/cadence-quadspi/
Right.
>
> On 17/12/21 05:16PM, Miquel Raynal wrote:
> > This controller has DTR support, so advertize it with a capability now
> > that the spi_controller_mem_ops structure contains this new field. This
> > will later be used by the core to discriminate whether an operation is
> > supported or not, in a more generic way than having different helpers.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/spi/spi-cadence-quadspi.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> > index 101cc71bffa7..98e0cc4236e3 100644
> > --- a/drivers/spi/spi-cadence-quadspi.c
> > +++ b/drivers/spi/spi-cadence-quadspi.c
> > @@ -1388,10 +1388,15 @@ static const char *cqspi_get_name(struct spi_mem *mem)
> > return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), mem->spi->chip_select);
> > }
> >
> > +static const struct spi_controller_mem_caps cqspi_mem_caps = {
> > + .dtr = true,
> > +};
> > +
> > static const struct spi_controller_mem_ops cqspi_mem_ops = {
> > .exec_op = cqspi_exec_mem_op,
> > .get_name = cqspi_get_name,
> > .supports_op = cqspi_supports_mem_op,
> > + .caps = &cqspi_mem_caps,
>
> I just noticed you put it under struct spi_mem_ops, not under struct
> spi_mem. This is not an operation per se so wouldn't it be better if it
> is moved to struct spi_mem?
I had a hard time taking a decision but my conclusion was that these
caps are static controller capabilities and exclusively tight to the
controller. The spi_mem structure defines a SPI peripheral. The
spi_mem_ops structure is the only spi-mem related field of the
spi-controller structure. I could have added my own field there but
as these caps are only meant to be used by the spi_mem_ops anyway
(exclusively ->supports_op() for now), it seemed to be a good location,
at least better than the spi-mem structure.
> Anyway, the change itself looks good to me. The cqspi_supports_mem_op()
> already checks for mixed DTR modes so we should be good.
Yep!
>
> > };
> >
> > static int cqspi_setup_flash(struct cqspi_st *cqspi)
> > --
> > 2.27.0
> >
>
Thanks,
Miquèl
next prev parent reply other threads:[~2021-12-21 10:16 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-17 16:16 [PATCH v7 00/14] External ECC engines & Macronix support Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 01/14] spi: spi-mem: Fix a DTR related check in spi_mem_dtr_supports_op() Miquel Raynal
2021-12-20 18:39 ` Pratyush Yadav
2021-12-21 9:50 ` Miquel Raynal
2021-12-21 10:15 ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 02/14] spi: spi-mem: Introduce a capability structure Miquel Raynal
2021-12-20 18:43 ` Pratyush Yadav
2021-12-21 9:35 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 03/14] spi: spi-mem: Check the controller extra capabilities Miquel Raynal
2021-12-20 18:48 ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 04/14] spi: cadence: Provide a capability structure Miquel Raynal
2021-12-20 18:55 ` Pratyush Yadav
2021-12-21 10:16 ` Miquel Raynal [this message]
2021-12-21 10:41 ` Pratyush Yadav
2021-12-21 11:19 ` Miquel Raynal
2021-12-21 12:05 ` Pratyush Yadav
2022-01-03 8:38 ` Boris Brezillon
2022-01-03 9:18 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 05/14] spi: mxic: " Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 06/14] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal
2021-12-20 18:58 ` Pratyush Yadav
2021-12-21 9:58 ` Miquel Raynal
2021-12-21 10:10 ` Pratyush Yadav
2021-12-21 10:25 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 07/14] spi: spi-mem: Add an ecc_en parameter to the spi_mem_op structure Miquel Raynal
2021-12-20 19:02 ` Pratyush Yadav
2021-12-21 17:37 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 08/14] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 09/14] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 10/14] spi: mxic: Fix the transmit path Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 11/14] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 12/14] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 13/14] spi: mxic: Add support for direct mapping Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 14/14] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
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