From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Pratyush Yadav <p.yadav@ti.com>
Cc: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>,
Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Boris Brezillon <boris.brezillon@collabora.com>
Subject: Re: [PATCH v7 07/14] spi: spi-mem: Add an ecc_en parameter to the spi_mem_op structure
Date: Tue, 21 Dec 2021 18:37:28 +0100 [thread overview]
Message-ID: <20211221183728.6600aae4@xps13> (raw)
In-Reply-To: <20211220190227.oqvpcfrro32ic32b@ti.com>
Hi Pratyush,
p.yadav@ti.com wrote on Tue, 21 Dec 2021 00:32:29 +0530:
> On 17/12/21 05:16PM, Miquel Raynal wrote:
> > Soon the SPI-NAND core will need a way to request a SPI controller to
> > enable ECC support for a given operation. This is because of the
> > pipelined integration of certain ECC engines, which are directly managed
> > by the SPI controller itself.
> >
> > Introduce a spi_mem_op additional field for this purpose: ecc_en.
> >
> > So far this field is left unset and checked to be false by all
> > the SPI controller drivers in their ->supports_op() hook, as they all
> > call spi_mem_default_supports_op().
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > drivers/spi/spi-mem.c | 5 +++++
> > include/linux/spi/spi-mem.h | 5 +++++
> > 2 files changed, 10 insertions(+)
> >
> > diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> > index cfe1c99db5f3..94758e7e747d 100644
> > --- a/drivers/spi/spi-mem.c
> > +++ b/drivers/spi/spi-mem.c
> > @@ -178,6 +178,11 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
> > return false;
> > }
> >
> > + if (op->ecc_en) {
> > + if (!spi_mem_controller_is_capable(ctlr, ecc))
> > + return false;
> > + }
> > +
> > return spi_mem_check_buswidth(mem, op);
> > }
> > EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
> > diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
> > index d7787c8f3746..e9238a858109 100644
> > --- a/include/linux/spi/spi-mem.h
> > +++ b/include/linux/spi/spi-mem.h
> > @@ -94,6 +94,7 @@ enum spi_mem_data_dir {
> > * operation does not involve transferring data
> > * @data.buf.in: input buffer (must be DMA-able)
> > * @data.buf.out: output buffer (must be DMA-able)
> > + * @ecc_en: error correction is required
> > */
> > struct spi_mem_op {
> > struct {
> > @@ -126,6 +127,8 @@ struct spi_mem_op {
> > const void *out;
> > } buf;
> > } data;
> > +
> > + bool ecc_en;
>
> ECC should only concern the data phase right? Would it make more sense
> to move this field under data?
>
> Anyway, I don't know much about NAND or ECC so either way,
I've moved the field to the data struct because it makes indeed more
sense. I've also changed the type and name to "u8 ecc : 1;" to match
the style used for the dtr parameter.
>
> Acked-by: Pratyush Yadav <p.yadav@ti.com>
>
> > };
> >
> > #define SPI_MEM_OP(__cmd, __addr, __dummy, __data) \
> > @@ -223,9 +226,11 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
> > /**
> > * struct spi_controller_mem_caps - SPI memory controller capabilities
> > * @dtr: Supports DTR operations
> > + * @ecc: Supports operations with error correction
> > */
> > struct spi_controller_mem_caps {
> > bool dtr;
> > + bool ecc;
> > };
> >
> > #define spi_mem_controller_is_capable(ctlr, cap) \
> > --
> > 2.27.0
> >
>
Thanks,
Miquèl
next prev parent reply other threads:[~2021-12-21 17:37 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-17 16:16 [PATCH v7 00/14] External ECC engines & Macronix support Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 01/14] spi: spi-mem: Fix a DTR related check in spi_mem_dtr_supports_op() Miquel Raynal
2021-12-20 18:39 ` Pratyush Yadav
2021-12-21 9:50 ` Miquel Raynal
2021-12-21 10:15 ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 02/14] spi: spi-mem: Introduce a capability structure Miquel Raynal
2021-12-20 18:43 ` Pratyush Yadav
2021-12-21 9:35 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 03/14] spi: spi-mem: Check the controller extra capabilities Miquel Raynal
2021-12-20 18:48 ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 04/14] spi: cadence: Provide a capability structure Miquel Raynal
2021-12-20 18:55 ` Pratyush Yadav
2021-12-21 10:16 ` Miquel Raynal
2021-12-21 10:41 ` Pratyush Yadav
2021-12-21 11:19 ` Miquel Raynal
2021-12-21 12:05 ` Pratyush Yadav
2022-01-03 8:38 ` Boris Brezillon
2022-01-03 9:18 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 05/14] spi: mxic: " Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 06/14] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal
2021-12-20 18:58 ` Pratyush Yadav
2021-12-21 9:58 ` Miquel Raynal
2021-12-21 10:10 ` Pratyush Yadav
2021-12-21 10:25 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 07/14] spi: spi-mem: Add an ecc_en parameter to the spi_mem_op structure Miquel Raynal
2021-12-20 19:02 ` Pratyush Yadav
2021-12-21 17:37 ` Miquel Raynal [this message]
2021-12-17 16:16 ` [PATCH v7 08/14] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 09/14] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 10/14] spi: mxic: Fix the transmit path Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 11/14] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 12/14] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 13/14] spi: mxic: Add support for direct mapping Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 14/14] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
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