Linux SPI subsystem development
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From: Chanho Park <chanho61.park@samsung.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Andi Shyti <andi@etezian.org>, Mark Brown <broonie@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
	devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Chanho Park <chanho61.park@samsung.com>
Subject: [PATCH v3 4/4] spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC
Date: Wed, 29 Jun 2022 19:23:04 +0900	[thread overview]
Message-ID: <20220629102304.65712-5-chanho61.park@samsung.com> (raw)
In-Reply-To: <20220629102304.65712-1-chanho61.park@samsung.com>

Add exynosautov9 spi port configuration. It supports up to 12 spis so
MAX_SPI_PORTS should be increased from 6 to 12.
It has DIV_4 as the default internal clock divider and an internal
loopback mode to run a loopback test.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andi Shyti <andi@etezian.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 drivers/spi/spi-s3c64xx.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index ff565e57736b..7f346866614a 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -18,7 +18,7 @@
 
 #include <linux/platform_data/spi-s3c64xx.h>
 
-#define MAX_SPI_PORTS		6
+#define MAX_SPI_PORTS		12
 #define S3C64XX_SPI_QUIRK_POLL		(1 << 0)
 #define S3C64XX_SPI_QUIRK_CS_AUTO	(1 << 1)
 #define AUTOSUSPEND_TIMEOUT	2000
@@ -1451,6 +1451,19 @@ static const struct s3c64xx_spi_port_config exynos5433_spi_port_config = {
 	.quirks		= S3C64XX_SPI_QUIRK_CS_AUTO,
 };
 
+static const struct s3c64xx_spi_port_config exynosautov9_spi_port_config = {
+	.fifo_lvl_mask	= { 0x1ff, 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff, 0x7f,
+			    0x7f, 0x7f, 0x7f, 0x7f},
+	.rx_lvl_offset	= 15,
+	.tx_st_done	= 25,
+	.clk_div	= 4,
+	.high_speed	= true,
+	.clk_from_cmu	= true,
+	.clk_ioclk	= true,
+	.has_loopback	= true,
+	.quirks		= S3C64XX_SPI_QUIRK_CS_AUTO,
+};
+
 static const struct s3c64xx_spi_port_config fsd_spi_port_config = {
 	.fifo_lvl_mask	= { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f},
 	.rx_lvl_offset	= 15,
@@ -1492,6 +1505,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = {
 	{ .compatible = "samsung,exynos5433-spi",
 			.data = (void *)&exynos5433_spi_port_config,
 	},
+	{ .compatible = "samsung,exynosautov9-spi",
+			.data = (void *)&exynosautov9_spi_port_config,
+	},
 	{ .compatible = "tesla,fsd-spi",
 			.data = (void *)&fsd_spi_port_config,
 	},
-- 
2.36.1


  parent reply	other threads:[~2022-06-29 10:25 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20220629102527epcas2p4ab04f91877e5f744c4a4e37827d19ce8@epcas2p4.samsung.com>
2022-06-29 10:23 ` [PATCH v3 0/4] spi support for Exynos Auto v9 SoC Chanho Park
2022-06-29 10:23   ` [PATCH v3 1/4] spi: s3c64xx: support loopback mode Chanho Park
2022-06-29 10:23   ` [PATCH v3 2/4] spi: s3c64xx: support custom value of internal clock divider Chanho Park
2022-06-29 10:52     ` Andi Shyti
2022-06-29 11:13     ` Krzysztof Kozlowski
2022-06-29 11:36     ` Mark Brown
2022-06-30  9:07     ` Linus Walleij
2022-06-30  9:16     ` Linus Walleij
2022-07-01  7:08       ` Chanho Park
2022-06-29 10:23   ` [PATCH v3 3/4] dt-bindings: samsung,spi: define exynosautov9 compatible Chanho Park
2022-06-29 10:23   ` Chanho Park [this message]
2022-06-29 14:44   ` [PATCH v3 0/4] spi support for Exynos Auto v9 SoC Mark Brown

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