From: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
To: <broonie@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>
Subject: [PATCH v2 SPI for-next 0/2] spi: microchip: pci1xxxx: Load SPI driver for SPI endpoint of PCI1XXXX switch
Date: Thu, 6 Oct 2022 10:35:12 +0530 [thread overview]
Message-ID: <20221006050514.115564-1-tharunkumar.pasumarthi@microchip.com> (raw)
Microchip PCI1XXXX is an unmanaged PCIe3.1a switch for consumer,
industrial, and automotive applications. This switch has multiple
downstream ports. One of the switch's downstream ports is a multifunction
endpoint; one of those functions supports SPI functionality. This series
of patches provides the SPI controller driver for the SPI function of the
multifunction PCIe endpoint of the switch.
RFC -> V2:
- Added logic to handle chip select disable case
- Set SPI_MASTER_MUST_TX flag
- Added logic to ensure current transaction is complete before suspending
Tharun Kumar P (2):
spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX
PCIe switch
spi: microchip: pci1xxxx: Add suspend and resume support for PCI1XXXX
SPI driver
drivers/spi/Kconfig | 9 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-pci1xxxx.c | 475 +++++++++++++++++++++++++++++++++++++
3 files changed, 485 insertions(+)
create mode 100644 drivers/spi/spi-pci1xxxx.c
--
2.25.1
next reply other threads:[~2022-10-06 5:05 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-06 5:05 Tharun Kumar P [this message]
2022-10-06 5:05 ` [PATCH v2 SPI for-next 1/2] spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch Tharun Kumar P
2022-10-06 5:05 ` [PATCH v2 SPI for-next 2/2] spi: microchip: pci1xxxx: Add suspend and resume support for PCI1XXXX SPI driver Tharun Kumar P
2022-10-13 13:35 ` Mark Brown
2022-10-19 4:18 ` Tharunkumar.Pasumarthi
2022-10-20 4:48 ` Tharunkumar.Pasumarthi
2022-10-18 12:45 ` (subset) [PATCH v2 SPI for-next 0/2] spi: microchip: pci1xxxx: Load SPI driver for SPI endpoint of PCI1XXXX switch Mark Brown
2022-11-29 18:02 ` Mark Brown
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