From: Dhruva Gole <d-gole@ti.com>
To: <broonie@kernel.org>
Cc: Dhruva Gole <d-gole@ti.com>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, Vignesh <vigneshr@ti.com>,
Pratyush Yadav <pratyush@kernel.org>,
Vaishnav Achath <vaishnav.a@ti.com>
Subject: [PATCH 0/2] spi: cqspi: Fix register reads in STIG Mode
Date: Wed, 4 Jan 2023 11:56:02 +0530 [thread overview]
Message-ID: <20230104062604.1556763-1-d-gole@ti.com> (raw)
Intent of these patches is to fix register reads in STIG mode and also
use STIG mode while reading flash registers.
Currently if you try to read a register while in STIG mode there is no
support for ADDR and thus naturally a register never gets read from the
flash.
Logs demonstrating the usage and working of QSPI-NOR Flash (Cypress
s25hs512t) on a modified AM625 SK EVM can be found on the link below:
https://gist.github.com/DhruvaG2000/a9b90d3d9c60edd3b2d8a360d869a00b
A series very similar to this was also sent to u-boot and the latest
revision can be viewed here:
[PATCH V4 0/2] spi: cqspi: Fix register reads in STIG Mode
https://lore.kernel.org/u-boot/20230103063112.1165898-1-d-gole@ti.com/
Dhruva Gole (2):
spi: cadence-quadspi: setup ADDR Bits in cmd reads
spi: cadence-quadspi: use STIG mode for small reads
drivers/spi/spi-cadence-quadspi.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
--
2.25.1
next reply other threads:[~2023-01-04 6:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-04 6:26 Dhruva Gole [this message]
2023-01-04 6:26 ` [PATCH 1/2] spi: cadence-quadspi: setup ADDR Bits in cmd reads Dhruva Gole
2023-01-04 6:26 ` [PATCH 2/2] spi: cadence-quadspi: use STIG mode for small reads Dhruva Gole
2023-01-10 5:10 ` Vaishnav Achath
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