From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Chuanhong Guo <gch981213@gmail.com>,
Xiangsheng Hou <xiangsheng.hou@mediatek.com>,
<linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <benliang.zhao@mediatek.com>,
<bin.zhang@mediatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Subject: [PATCH v6 4/5] spi: mtk-snfi: Add snfi sample delay and read latency adjustment
Date: Wed, 1 Feb 2023 10:09:20 +0800 [thread overview]
Message-ID: <20230201020921.26712-5-xiangsheng.hou@mediatek.com> (raw)
In-Reply-To: <20230201020921.26712-1-xiangsheng.hou@mediatek.com>
Add snfi sample delay and read latency adjustment which can get
from dts property.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/spi/spi-mtk-snfi.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/spi/spi-mtk-snfi.c b/drivers/spi/spi-mtk-snfi.c
index 85644308df23..f3f95eb37365 100644
--- a/drivers/spi/spi-mtk-snfi.c
+++ b/drivers/spi/spi-mtk-snfi.c
@@ -195,6 +195,8 @@
#define DATA_READ_MODE_X4 2
#define DATA_READ_MODE_DUAL 5
#define DATA_READ_MODE_QUAD 6
+#define DATA_READ_LATCH_LAT GENMASK(9, 8)
+#define DATA_READ_LATCH_LAT_S 8
#define PG_LOAD_CUSTOM_EN BIT(7)
#define DATARD_CUSTOM_EN BIT(6)
#define CS_DESELECT_CYC_S 0
@@ -205,6 +207,9 @@
#define SNF_DLY_CTL3 0x548
#define SFCK_SAM_DLY_S 0
+#define SFCK_SAM_DLY GENMASK(5, 0)
+#define SFCK_SAM_DLY_TOTAL 9
+#define SFCK_SAM_DLY_RANGE 47
#define SNF_STA_CTL1 0x550
#define CUS_PG_DONE BIT(28)
@@ -1368,6 +1373,8 @@ static int mtk_snand_probe(struct platform_device *pdev)
const struct of_device_id *dev_id;
struct spi_controller *ctlr;
struct mtk_snand *ms;
+ unsigned long spi_freq;
+ u32 val = 0;
int ret;
dev_id = of_match_node(mtk_snand_ids, np);
@@ -1446,6 +1453,19 @@ static int mtk_snand_probe(struct platform_device *pdev)
// switch to SNFI mode
nfi_write32(ms, SNF_CFG, SPI_MODE);
+ ret = of_property_read_u32(np, "rx-sample-delay-ns", &val);
+ if (!ret)
+ nfi_rmw32(ms, SNF_DLY_CTL3, SFCK_SAM_DLY,
+ val * SFCK_SAM_DLY_RANGE / SFCK_SAM_DLY_TOTAL);
+
+ ret = of_property_read_u32(np, "mediatek,rx-latch-latency-ns", &val);
+ if (!ret) {
+ spi_freq = clk_get_rate(ms->pad_clk);
+ val = DIV_ROUND_CLOSEST(val, NSEC_PER_SEC / spi_freq);
+ nfi_rmw32(ms, SNF_MISC_CTL, DATA_READ_LATCH_LAT,
+ val << DATA_READ_LATCH_LAT_S);
+ }
+
// setup an initial page format for ops matching page_cache_op template
// before ECC is called.
ret = mtk_snand_setup_pagefmt(ms, SZ_2K, SZ_64);
--
2.25.1
next prev parent reply other threads:[~2023-02-01 2:10 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-01 2:09 [PATCH v6 0/5] Add MediaTek MT7986 SPI NAND support Xiangsheng Hou
2023-02-01 2:09 ` [PATCH v6 1/5] spi: mtk-snfi: Change default page format to setup default setting Xiangsheng Hou
2023-02-01 2:09 ` [PATCH v6 2/5] spi: mtk-snfi: Add optional nfi_hclk which is needed for MT7986 Xiangsheng Hou
2023-02-01 2:09 ` [PATCH v6 3/5] dt-bindings: spi: mtk-snfi: Add compatible " Xiangsheng Hou
2023-02-01 2:09 ` Xiangsheng Hou [this message]
2023-02-01 2:09 ` [PATCH v6 5/5] dt-bindings: spi: mtk-snfi: Add read latch latency property Xiangsheng Hou
2023-02-09 19:18 ` [PATCH v6 0/5] Add MediaTek MT7986 SPI NAND support Mark Brown
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