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From: Conor Dooley <conor@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	William Qiu <william.qiu@starfivetech.com>,
	devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC
Date: Tue, 4 Jul 2023 17:41:07 +0100	[thread overview]
Message-ID: <20230704-commute-grape-38ded99556d5@spud> (raw)
In-Reply-To: <41c905da-ae3e-4acb-bbfa-d33d3306824d@sirena.org.uk>

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On Tue, Jul 04, 2023 at 03:13:17PM +0100, Mark Brown wrote:
> On Tue, Jul 04, 2023 at 03:21:30PM +0200, Krzysztof Kozlowski wrote:
> > On 04/07/2023 15:16, Mark Brown wrote:
> > > On Tue, Jul 04, 2023 at 02:27:57PM +0200, Krzysztof Kozlowski wrote:
> 
> > >> Also see:
> > >> "every Co-developed-by: must be immediately
> > >> followed by a Signed-off-by: of the associated co-author."
> 
> > >> https://elixir.bootlin.com/linux/v6.4/source/Documentation/process/submitting-patches.rst#L467
> 
> > > Oh, that seems unhelpful especially with it not lining up with the DCO.
> 
> > I assume the intention was here that if I attribute some co-author with
> > Co-developed-by, then I know that author, therefore I expect author to
> > explicitly participate in DCO chain.
> 
> Why?  They're not the one sending the patch out, nor are they relying on
> someone else having certified anything.

It's probably safe to say that StarFive owns the contributions anyway,
so I doubt adding really makes a difference here.

> > Otherwise, just drop the Co-developed-by.
> 
> It seems separately useful.

Yup, I'd rather have the people there if I ever have to run `git blame`
on whatever commit this becomes.

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  reply	other threads:[~2023-07-04 16:41 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-04  9:21 [RESEND v1 0/2] Add SPI module for StarFive JH7110 SoC William Qiu
2023-07-04  9:21 ` [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names William Qiu
2023-07-04  9:38   ` Krzysztof Kozlowski
2023-07-05  3:37     ` William Qiu
2023-07-05  6:00       ` Krzysztof Kozlowski
2023-07-05  6:20         ` William Qiu
2023-07-04  9:22 ` [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu
2023-07-04  9:39   ` Krzysztof Kozlowski
2023-07-04 12:26     ` Mark Brown
2023-07-04 12:27       ` Krzysztof Kozlowski
2023-07-04 13:16         ` Mark Brown
2023-07-04 13:21           ` Krzysztof Kozlowski
2023-07-04 14:13             ` Mark Brown
2023-07-04 16:41               ` Conor Dooley [this message]
2023-07-05  3:40     ` William Qiu

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