From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FD40EDE99F for ; Thu, 14 Sep 2023 09:12:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236610AbjINJML (ORCPT ); Thu, 14 Sep 2023 05:12:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236571AbjINJMK (ORCPT ); Thu, 14 Sep 2023 05:12:10 -0400 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12BDEA8; Thu, 14 Sep 2023 02:12:05 -0700 (PDT) Received: by mail.gandi.net (Postfix) with ESMTPSA id 95BA820014; Thu, 14 Sep 2023 09:12:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1694682724; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sZUp78CbCWiQi+n4QkbM3H0gqDpSMC7eDQTX0Zn+ubA=; b=Nc1JEMpXO0JTeV4oPE/a/KDzC94mrVPVHINRSwwSBa/3uVDS83V3jsyc0lLKJAeTNGSTy/ RtY7rxiv4hNjNBRUXghWtFJYbuSFJMizensSetIcfsWmHgIzeTb6jem6dNGSbDqlwHkNJn M+T+ydLsd9Wje1h4oSzmN9Y3LV5juesSdKPVdVhUYIYO+WxRB9RsxsY2JZM6SmhDcHWPa5 h4Q/fDCUdnsFwzbBX2Ofa6Gf0Ed1ZSm5JGdysn+yNhS31myoMolWcRDzgE6VQXXlKB1gFV pCxtI6Q3S58unaesZ1BtHX/npC2hugHv57OwvddxzI0YmIEzTdWmF/3m8U4vYQ== Date: Thu, 14 Sep 2023 11:12:00 +0200 From: Miquel Raynal To: Geert Uytterhoeven Cc: Krzysztof Kozlowski , Biju Das , Prabhakar Mahadev Lad , "linux-renesas-soc@vger.kernel.org" , Vignesh Raghavendra , Tudor Ambarus , Mark Brown , MTD Maling List , linux-spi , Rob Herring , Michael Walle Subject: Re: [PATCH] memory: renesas-rpc-if: Fix IO state based on flash type Message-ID: <20230914111200.6e6832ca@xps-13> In-Reply-To: References: <20230830145835.296690-1-biju.das.jz@bp.renesas.com> <502336e9-2455-f3f6-57d1-807bc4b71f7f@linaro.org> <20230914105937.4af00bf2@xps-13> Organization: Bootlin X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: miquel.raynal@bootlin.com Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Hi Geert, geert@linux-m68k.org wrote on Thu, 14 Sep 2023 11:04:01 +0200: > Hi Miquel, >=20 > On Thu, Sep 14, 2023 at 10:59=E2=80=AFAM Miquel Raynal > wrote: > > geert@linux-m68k.org wrote on Thu, 14 Sep 2023 10:34:50 +0200: =20 > > > On Thu, Sep 14, 2023 at 10:08=E2=80=AFAM Krzysztof Kozlowski > > > wrote: =20 > > > > On 30/08/2023 17:18, Biju Das wrote: =20 > > > > >>> regmap_update_bits(rpc->regmap, RPCIF_CMNCR, @@= -774,6 > > > > >>> +776,12 @@ static int rpcif_probe(struct platform_device *pdev) > > > > >>> return ret; > > > > >>> } > > > > >>> > > > > >>> + if (rpc->info->type =3D=3D RPCIF_RZ_G2L && =20 > > > > >> > > > > >> Wouldn't this apply to non-RZ/G2L systems, too? =20 > > > > > > > > > > It applies, if the device uses the flash[1] or [2] and it needs > > > > > 4-bit tx support. > > > > > > > > > > [1] Figure 20: QUAD INPUT/OUTPUT FAST READ =E2=80=93 EBh/ECh > > > > > https://media-www.micron.com/-/media/client/global/documents/prod= ucts/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qlks_u_512_aba_0= .pdf?rev=3D3e5b2a574f7b4790b6e58dacf4c889b2 > > > > > > > > > > [2] section 8.14 > > > > > > > > > > https://www.renesas.com/eu/en/document/dst/at25ql128a-datasheet?r= =3D1608586 =20 > > > > > > > > Geert, > > > > > > > > Does it answer your comment or do you expect here some changes? =20 > > > > > > Well, now it has been confirmed this applies to non-RZ/G2L systems, t= oo, > > > the check for RPCIF_RZ_G2L should probably be removed. In upstream, > > > only arch/arm64/boot/dts/renesas/rzg2l{,c}-smarc-som.dtsi have devices > > > that are compatible with "micron,mt25qu512a", but obviously they can > > > appear elsewhere, too. > > > > > > Now, the presence of that compatible value in rzg2l{,c}-smarc-som.dtsi > > > currently causes a dtbs_check warning, as it is not documented. > > > However, there has been some pushback against adding more compatible > > > values, cfr. my patch to add mt25qu512a[1], and Miquel's commit [2]. = =20 > > > > Just FYI, I sent [2] after an unsuccessful attempt to update that list > > too, see [3]. The idea is: if you don't have anything useful to add, =20 >=20 > Oh, I didn't know that. >=20 > > just use the generic compatible. If you need specific changes, you can > > add an entry. =20 >=20 > The problem is that usually these things are discovered too late, > so the only prudent way is to be proactive, and always add them. > Initially I thought that the different handling on RZ/G2L was due > to a difference in the RPC-IF block. But now we know it's due to the > type of FLASH attached. Actually what I say is wrong, we are not supposed to touch that list anymore and prefer to handle the issues in the drivers by auto-discovery. Can't we do that in your case? > > [3] https://lore.kernel.org/linux-mtd/d816499e-baab-6200-0780-17a8205b2= 52e@linaro.org/ > > =20 > > > But the issue Biju is seeing proves there is a need to add these. > > > > > > In addition, I had hoped to gather some feedback or guidance from the > > > hyperbus and/or spi people, as issues w.r.t. pin states will eventual= ly > > > pop up on other systems, too, and thus may need handling in the core, > > > instead of in each individual device driver. But of course that can > > > be done later, when the need arises. > > > > > > Thanks! > > > > > > [1] "[PATCH] dt-bindings: mtd: jedec,spi-nor: Document support for > > > more MT25QU parts" > > > https://lore.kernel.org/all/363186079b4269891073f620e3e2353cf7d25= 59a.1669988238.git.geert+renesas@glider.be > > > [2] 4b0cb4e7ab2f777c ("dt-bindings: mtd: spi-nor: clarify the need for > > > spi-nor compatibles"). =20 >=20 Thanks, Miqu=C3=A8l