From: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
To: <broonie@kernel.org>, <tudor.ambarus@linaro.org>,
<pratyush@kernel.org>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <vigneshr@ti.com>,
<sbinding@opensource.cirrus.com>
Cc: <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<michael@walle.cc>, <linux-mtd@lists.infradead.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>, <michal.simek@amd.com>,
<linux-arm-kernel@lists.infradead.org>, <git@amd.com>,
<amitrkcian2002@gmail.com>,
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Subject: [PATCH v10 4/8] mtd: spi-nor: Move write enable inside specific write & erase APIs
Date: Sat, 18 Nov 2023 19:24:42 +0530 [thread overview]
Message-ID: <20231118135446.52783-5-amit.kumar-mahapatra@amd.com> (raw)
In-Reply-To: <20231118135446.52783-1-amit.kumar-mahapatra@amd.com>
In most of the register write operations the spi_nor_write_enable is called
from within that API from where spi_mem APIs are called. Follwoing the same
trend move the write enable API from spi_nor_write & spi_nor_erase APIs to
the respective write & erase APIs.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
---
drivers/mtd/spi-nor/core.c | 40 ++++++++++++++------------------------
1 file changed, 15 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 72c80d8b5858..93ae69b7ff83 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -301,6 +301,12 @@ static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t to,
ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
const u8 *buf)
{
+ int ret;
+
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
if (nor->spimem)
return spi_nor_spimem_write_data(nor, to, len, buf);
@@ -1074,6 +1080,10 @@ static int spi_nor_erase_chip(struct spi_nor *nor)
dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10));
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
if (nor->spimem) {
struct spi_mem_op op = SPI_NOR_CHIP_ERASE_OP;
@@ -1481,10 +1491,14 @@ static u32 spi_nor_convert_addr(struct spi_nor *nor, loff_t addr)
*/
int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
{
- int i;
+ int i, ret;
addr = spi_nor_convert_addr(nor, addr);
+ ret = spi_nor_write_enable(nor);
+ if (ret)
+ return ret;
+
if (nor->spimem) {
struct spi_mem_op op =
SPI_NOR_SECTOR_ERASE_OP(nor->erase_opcode,
@@ -1777,12 +1791,6 @@ static int spi_nor_erase_multi_sectors(struct spi_nor *nor, u64 addr, u32 len)
if (ret)
goto destroy_erase_cmd_list;
- ret = spi_nor_write_enable(nor);
- if (ret) {
- spi_nor_unlock_device(nor);
- goto destroy_erase_cmd_list;
- }
-
ret = spi_nor_erase_sector(nor, addr);
spi_nor_unlock_device(nor);
if (ret)
@@ -1841,12 +1849,6 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
if (ret)
goto erase_err;
- ret = spi_nor_write_enable(nor);
- if (ret) {
- spi_nor_unlock_device(nor);
- goto erase_err;
- }
-
ret = spi_nor_erase_chip(nor);
spi_nor_unlock_device(nor);
if (ret)
@@ -1877,12 +1879,6 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
if (ret)
goto erase_err;
- ret = spi_nor_write_enable(nor);
- if (ret) {
- spi_nor_unlock_device(nor);
- goto erase_err;
- }
-
ret = spi_nor_erase_sector(nor, addr);
spi_nor_unlock_device(nor);
if (ret)
@@ -2177,12 +2173,6 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
if (ret)
goto write_err;
- ret = spi_nor_write_enable(nor);
- if (ret) {
- spi_nor_unlock_device(nor);
- goto write_err;
- }
-
ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
spi_nor_unlock_device(nor);
if (ret < 0)
--
2.17.1
next prev parent reply other threads:[~2023-11-18 13:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-18 13:54 [PATCH v10 0/8] spi: Add support for stacked/parallel memories Amit Kumar Mahapatra
2023-11-18 13:54 ` [PATCH v10 1/8] spi: Add multi-cs memories support in SPI core Amit Kumar Mahapatra
2023-11-20 14:02 ` Mark Brown
2023-11-21 7:18 ` Mahapatra, Amit Kumar
2023-11-20 14:30 ` Stefan Binding
2023-11-21 7:39 ` Mahapatra, Amit Kumar
2023-11-21 13:58 ` Stefan Binding
2023-11-21 16:35 ` Mahapatra, Amit Kumar
2023-11-21 17:37 ` Stefan Binding
2023-11-21 19:18 ` Mahapatra, Amit Kumar
2023-11-22 11:21 ` Stefan Binding
2023-11-22 13:22 ` Mahapatra, Amit Kumar
2023-11-24 17:33 ` Stefan Binding
2023-11-18 13:54 ` [PATCH v10 2/8] mtd: spi-nor: Convert macros with inline functions Amit Kumar Mahapatra
2023-11-18 13:54 ` [PATCH v10 3/8] mtd: spi-nor: Add APIs to set/get nor->params Amit Kumar Mahapatra
2023-11-18 13:54 ` Amit Kumar Mahapatra [this message]
2023-11-18 13:54 ` [PATCH v10 5/8] mtd: spi-nor: Add stacked memories support in spi-nor Amit Kumar Mahapatra
2023-11-18 13:54 ` [PATCH v10 6/8] spi: spi-zynqmp-gqspi: Add stacked memories support in GQSPI driver Amit Kumar Mahapatra
2023-11-18 13:54 ` [PATCH v10 7/8] mtd: spi-nor: Add parallel memories support in spi-nor Amit Kumar Mahapatra
2023-11-18 13:54 ` [PATCH v10 8/8] spi: spi-zynqmp-gqspi: Add parallel memories support in GQSPI driver Amit Kumar Mahapatra
2023-12-07 22:34 ` (subset) [PATCH v10 0/8] spi: Add support for stacked/parallel memories Mark Brown
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