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From: Michael Walle <mwalle@kernel.org>
To: haibo.chen@nxp.com
Cc: broonie@kernel.org, han.xu@nxp.com, linux-imx@nxp.com,
	linux-spi@vger.kernel.org, yogeshgaur.83@gmail.com,
	Michael Walle <mwalle@kernel.org>
Subject: Re: [PATCH 2/5] spi: spi-nxp-fspi: change the default lut index
Date: Wed, 13 Dec 2023 17:24:36 +0100	[thread overview]
Message-ID: <20231213162436.2770068-1-mwalle@kernel.org> (raw)
In-Reply-To: <20231213091346.956789-2-haibo.chen@nxp.com>

> The fspi dynamic lut use the last lut for all IPS operations, the
> imx8ulp only supports 15 luts, so change the last lut index from

It's 16 LUTs, no? There's also index 0.

> 31 to 15.
> 
> Signed-off-by: Han Xu <han.xu@nxp.com>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  drivers/spi/spi-nxp-fspi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index 0feecf5ba010..9d6b4d22263c 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -64,9 +64,9 @@
>  /*
>   * The driver only uses one single LUT entry, that is updated on
>   * each call of exec_op(). Index 0 is preset at boot with a basic
> - * read operation, so let's use the last entry (31).
> + * read operation, so let's use the last entry (15).

Please add the information about the imx8mulp to the comment.
Otherwise, the comment will be confusing for SoCs where there
are 32 LUTs.

-michael

>   */
> -#define	SEQID_LUT			31
> +#define	SEQID_LUT			15
>  
>  /* Registers used by the driver */
>  #define FSPI_MCR0			0x00
> -- 
2.34.1



  reply	other threads:[~2023-12-13 16:24 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13  9:13 [PATCH 1/5] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2023-12-13  9:13 ` [PATCH 2/5] spi: spi-nxp-fspi: change the default lut index haibo.chen
2023-12-13 16:24   ` Michael Walle [this message]
2023-12-14  2:10     ` Bough Chen
2023-12-14  3:04   ` Adam Ford
2023-12-14  4:00     ` Bough Chen
2023-12-13  9:13 ` [PATCH 3/5] spi: spi-nxp-fspi: add DTR mode support haibo.chen
2023-12-13 16:53   ` Michael Walle
2023-12-14  3:09     ` Bough Chen
2023-12-14  9:45       ` Michael Walle
2023-12-13  9:13 ` [PATCH 4/5] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
2023-12-13 17:21   ` Michael Walle
2023-12-14  7:54     ` Bough Chen
2023-12-14  8:56       ` Michael Walle
2023-12-13  9:13 ` [PATCH 5/5] spi: spi-nxp-fspi: Add quirk to disable DTR support haibo.chen

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