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From: Michael Walle <mwalle@kernel.org>
To: haibo.chen@nxp.com
Cc: broonie@kernel.org, han.xu@nxp.com, linux-imx@nxp.com,
	linux-spi@vger.kernel.org, yogeshgaur.83@gmail.com,
	Michael Walle <mwalle@kernel.org>
Subject: Re: [PATCH 3/5] spi: spi-nxp-fspi: add DTR mode support
Date: Wed, 13 Dec 2023 17:53:05 +0100	[thread overview]
Message-ID: <20231213165305.2773796-1-mwalle@kernel.org> (raw)
In-Reply-To: <20231213091346.956789-3-haibo.chen@nxp.com>

> From: Haibo Chen <haibo.chen@nxp.com>
> 
> For LUT, add DTR command support.

Please elaborate a bit more.


> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  drivers/spi/spi-nxp-fspi.c | 27 ++++++++++++++++++++++-----
>  1 file changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index 9d6b4d22263c..2562d524149e 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -552,12 +552,22 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
>  	int lutidx = 1, i;
>  
>  	/* cmd */
> -	lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
> -			     op->cmd.opcode);
> +	if (op->cmd.dtr) {
> +		lutval[0] |= LUT_DEF(0, LUT_CMD_DDR, LUT_PAD(op->cmd.buswidth),
> +				     op->cmd.opcode >> 8);

Shouldn't we check cmd.nbytes here? You seem to mix dtr with cmd.nbytes ==
2 here.

> +		lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_CMD_DDR,
> +					      LUT_PAD(op->cmd.buswidth),
> +					      op->cmd.opcode & 0x00ff);

And you seem to assume dtr is always octal mode?

-michael

> +		lutidx++;
> +	} else {
> +		lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
> +				     op->cmd.opcode);
> +	}
>  
>  	/* addr bytes */
>  	if (op->addr.nbytes) {
> -		lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_ADDR,
> +		lutval[lutidx / 2] |= LUT_DEF(lutidx, op->addr.dtr ?
> +					      LUT_ADDR_DDR : LUT_ADDR,
>  					      LUT_PAD(op->addr.buswidth),
>  					      op->addr.nbytes * 8);
>  		lutidx++;
> @@ -565,7 +575,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
>  
>  	/* dummy bytes, if needed */
>  	if (op->dummy.nbytes) {
> -		lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_DUMMY,
> +		lutval[lutidx / 2] |= LUT_DEF(lutidx, op->dummy.dtr ?
> +					      LUT_DUMMY_DDR : LUT_DUMMY,
>  		/*
>  		 * Due to FlexSPI controller limitation number of PAD for dummy
>  		 * buswidth needs to be programmed as equal to data buswidth.
> @@ -580,7 +591,8 @@ static void nxp_fspi_prepare_lut(struct nxp_fspi *f,
>  	if (op->data.nbytes) {
>  		lutval[lutidx / 2] |= LUT_DEF(lutidx,
>  					      op->data.dir == SPI_MEM_DATA_IN ?
> -					      LUT_NXP_READ : LUT_NXP_WRITE,
> +					      (op->data.dtr ? LUT_READ_DDR : LUT_NXP_READ) :
> +					      (op->data.dtr ? LUT_WRITE_DDR : LUT_NXP_WRITE),
>  					      LUT_PAD(op->data.buswidth),
>  					      0);
>  		lutidx++;
> @@ -1152,6 +1164,10 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = {
>  	.get_name = nxp_fspi_get_name,
>  };
>  
> +static struct spi_controller_mem_caps nxp_fspi_mem_caps = {
> +	.dtr = true,
> +};
> +
>  static int nxp_fspi_probe(struct platform_device *pdev)
>  {
>  	struct spi_controller *ctlr;
> @@ -1254,6 +1270,7 @@ static int nxp_fspi_probe(struct platform_device *pdev)
>  	ctlr->bus_num = -1;
>  	ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT;
>  	ctlr->mem_ops = &nxp_fspi_mem_ops;
> +	ctlr->mem_caps = &nxp_fspi_mem_caps;
>  
>  	nxp_fspi_default_setup(f);
>  
> -- 
> 2.34.1

  reply	other threads:[~2023-12-13 16:53 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13  9:13 [PATCH 1/5] spi: spi-nxp-fspi: enable runtime pm for fspi haibo.chen
2023-12-13  9:13 ` [PATCH 2/5] spi: spi-nxp-fspi: change the default lut index haibo.chen
2023-12-13 16:24   ` Michael Walle
2023-12-14  2:10     ` Bough Chen
2023-12-14  3:04   ` Adam Ford
2023-12-14  4:00     ` Bough Chen
2023-12-13  9:13 ` [PATCH 3/5] spi: spi-nxp-fspi: add DTR mode support haibo.chen
2023-12-13 16:53   ` Michael Walle [this message]
2023-12-14  3:09     ` Bough Chen
2023-12-14  9:45       ` Michael Walle
2023-12-13  9:13 ` [PATCH 4/5] spi: spi-nxp-fspi: add function to select sample clock source for flash reading haibo.chen
2023-12-13 17:21   ` Michael Walle
2023-12-14  7:54     ` Bough Chen
2023-12-14  8:56       ` Michael Walle
2023-12-13  9:13 ` [PATCH 5/5] spi: spi-nxp-fspi: Add quirk to disable DTR support haibo.chen

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