[PATCH 0/4] spi: cadence-quadspi: correct chip-select logic

["Théo Lebrun" <theo.lebrun@bootlin.com>]

Hi,

Here are three independent patches that relate to the handling of
chip-select and the number of those in the spi-cadence-quadspi.c
driver.

 - First one is about checking each flash node reg (ie CS) against the
   ->num_chipselect value instead of the hardcoded max constant. That
   means it checks against the num-cs DT prop if it existed. Previously
   num-cs==1 with 2 flash nodes would have lead to no error,
   a ->num_chipselect==1 and 2 flashes.

 - Second, we lower the max CS constant from 16 to 4. The hardware only
   supports 4 anyway, and that makes for less memory used. This got
   discovered on v6.8-rc2 when the SPI subsystem imposed a max CS of 4.
   The change got reverted later.

 - Lastly, we adjust the ->num_chipselect value reported to the actual
   number of chip-selects. Previously, it reported either the num-cs DT
   prop or the max value (if no num-cs was provided).

There is also a small fix to move to modern names and avoid using the
legacy compatibility layer (slave, etc).

Thanks,
Théo

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
---
Théo Lebrun (4):
      spi: cadence-qspi: assert each subnode flash CS is valid
      spi: cadence-qspi: set maximum chip-select to 4
      spi: cadence-qspi: report correct number of chip-select
      spi: cadence-qspi: switch from legacy names to modern ones

 drivers/spi/spi-cadence-quadspi.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)
---
base-commit: 19b50f80b3a4865bd477aa5c026dd234d39a50d2
change-id: 20240209-cdns-qspi-cs-621bfe7f327f

Best regards,
-- 
Théo Lebrun <theo.lebrun@bootlin.com>