[PATCH] spi: davinci: Unset POWERDOWN bit when releasing resources

[PATCH] spi: davinci: Unset POWERDOWN bit when releasing resources

[Bastien Curutchet]

On the OMAPL138, the SPI reference clock is provided by the Power and
Sleep Controller (PSC). The PSC's datasheet says that 'some peripherals
have special programming requirements and additional recommended steps
you must take before you can invoke the PSC module state transition'. I
didn't find more details in documentation but it appears that PSC needs
the SPI to clear the POWERDOWN bit before disabling the clock. Indeed,
when this bit is set, the PSC gets stuck in transitions from enable to
disable state.

Clear the POWERDOWN bit when releasing driver's resources

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
---
Hi,

I ran into this bug by enabling the 'cs-gpio' property. It causes the
probe to fail at first with -EPROBE_DEFER because the gpio provider is
not ready. So the clock gets disabled. In the clock controller's driver
(drivers/clk/davinci/psc.c) the clock_disable() calls a
regmap_read_poll_timeout() with an infinite timeout. This poll() polls
a transition bit status that never goes down so we end stuck in the
middle of the boot sequence.

 drivers/spi/spi-davinci.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index be3998104bfb..f7e8b5efa50e 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -984,6 +984,9 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	return ret;
 
 free_dma:
+	/* This bit needs to be cleared to disable dpsi->clk */
+	clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+
 	if (dspi->dma_rx) {
 		dma_release_channel(dspi->dma_rx);
 		dma_release_channel(dspi->dma_tx);
@@ -1013,6 +1016,9 @@ static void davinci_spi_remove(struct platform_device *pdev)
 
 	spi_bitbang_stop(&dspi->bitbang);
 
+	/* This bit needs to be cleared to disable dpsi->clk */
+	clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK);
+
 	if (dspi->dma_rx) {
 		dma_release_channel(dspi->dma_rx);
 		dma_release_channel(dspi->dma_tx);
-- 
2.45.0

Re: [PATCH] spi: davinci: Unset POWERDOWN bit when releasing resources

[Mark Brown]

On Mon, 24 Jun 2024 09:17:45 +0200, Bastien Curutchet wrote:
> On the OMAPL138, the SPI reference clock is provided by the Power and
> Sleep Controller (PSC). The PSC's datasheet says that 'some peripherals
> have special programming requirements and additional recommended steps
> you must take before you can invoke the PSC module state transition'. I
> didn't find more details in documentation but it appears that PSC needs
> the SPI to clear the POWERDOWN bit before disabling the clock. Indeed,
> when this bit is set, the PSC gets stuck in transitions from enable to
> disable state.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: davinci: Unset POWERDOWN bit when releasing resources
      commit: 1762dc01fc78ef5f19693e9317eae7491c6c7e1b

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark