From: AlvinZhou <alvinzhou.tw@gmail.com>
To: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, mwalle@kernel.org,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org
Cc: chengminglin@mxic.com.tw, leoyu@mxic.com.tw,
AlvinZhou <alvinzhou@mxic.com.tw>
Subject: [PATCH v9 0/6] Add octal DTR support for Macronix flash
Date: Thu, 18 Jul 2024 11:46:08 +0800 [thread overview]
Message-ID: <20240718034614.484018-1-alvinzhou.tw@gmail.com> (raw)
From: AlvinZhou <alvinzhou@mxic.com.tw>
Add method for Macronix Octal DTR Eable/Disable.
Merge Tudor's patch "Allow specifying the byte order in DTR mode"
v9:
Change the name of the configuration register 2 for Macronix Octal flash.
Fix the bit value in __pad of struct spi_mem_op.
Use the local variable proto instead of nor->read_proto.
v8:
Supplement missing S-o-b
Remove function spi_nor_is_octal_dtr_swab16
Split IDs by MX25 & MX66
Add dump of capability in debugfs
Add dump of params in debugfs
Add dump of reult for mtd-utils tests
Add SNOR_ID(0xC2) in last of Macronix ID table
v7:
Add dtr_swab16 judgement to enable/disable Macronix xSPI host
controller swap byte feature.
v6:
Add byte swap support for spi-mxic.c
Remove flash name in ID table.
v5:
Remove manufacturer read id function.
For increased readability, separate Flash IDs based on whether
it supports RWW feature.
v4:
Add patch for adding manufacturer read id function.
remove patch "hook manufacturer by checking first byte id"
v3:
Add patch for hook manufacturer by comparing ID 1st byte.
Add patches for specifying the byte order in DTR mode by merging
Tudor's patch.
v2:
Following exsting rules to re-create Macronix specify Octal DTR method.
change signature to jaimeliao@mxic.com.tw
Clear sector size information in flash INFO.
AlvinZhou (6):
mtd: spi-nor: add Octal DTR support for Macronix flash
spi: spi-mem: Allow specifying the byte order in Octal DTR mode
mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode
mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
spi: mxic: Add support for swapping byte
mtd: spi-nor: add support for Macronix Octal flash
drivers/mtd/spi-nor/core.c | 4 ++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/macronix.c | 95 +++++++++++++++++++++++++++++++++-
drivers/mtd/spi-nor/sfdp.c | 4 ++
drivers/mtd/spi-nor/sfdp.h | 1 +
drivers/spi/spi-mem.c | 3 ++
drivers/spi/spi-mxic.c | 17 ++++--
include/linux/spi/spi-mem.h | 8 ++-
8 files changed, 127 insertions(+), 6 deletions(-)
--
2.25.1
next reply other threads:[~2024-07-18 3:47 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-18 3:46 AlvinZhou [this message]
2024-07-18 3:46 ` [PATCH v9 1/6] mtd: spi-nor: add Octal DTR support for Macronix flash AlvinZhou
2024-07-18 3:46 ` [PATCH v9 2/6] spi: spi-mem: Allow specifying the byte order in Octal DTR mode AlvinZhou
2024-09-24 11:37 ` Mark Brown
2024-07-18 3:46 ` [PATCH v9 3/6] mtd: spi-nor: core: " AlvinZhou
2024-07-18 3:46 ` [PATCH v9 4/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT AlvinZhou
2024-07-18 3:46 ` [PATCH v9 5/6] spi: mxic: Add support for swapping byte AlvinZhou
2024-09-24 11:38 ` Mark Brown
2024-09-24 14:29 ` Tudor Ambarus
2024-09-24 14:52 ` Mark Brown
2024-09-25 6:22 ` Tudor Ambarus
2024-07-18 3:46 ` [PATCH v9 6/6] mtd: spi-nor: add support for Macronix Octal flash AlvinZhou
2024-09-23 6:53 ` Tudor Ambarus
2024-09-23 7:18 ` Michael Walle
2024-09-24 3:25 ` Alvin Zhou
2024-09-24 6:26 ` Tudor Ambarus
2024-09-24 6:36 ` Tudor Ambarus
2024-09-24 7:17 ` Tudor Ambarus
2024-09-25 9:57 ` Miquel Raynal
2024-09-26 3:06 ` Alvin Zhou
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