From: Sean Anderson <sean.anderson@linux.dev>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@amd.com>,
linux-spi@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, Jinjie Ruan <ruanjinjie@huawei.com>,
linux-arm-kernel@lists.infradead.org,
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Sean Anderson <sean.anderson@linux.dev>
Subject: [PATCH 2/5] spi: zynqmp-gqspi: Reset device in probe
Date: Thu, 16 Jan 2025 17:55:18 -0500 [thread overview]
Message-ID: <20250116225521.2688224-3-sean.anderson@linux.dev> (raw)
In-Reply-To: <20250116225521.2688224-1-sean.anderson@linux.dev>
Ensure we get a clean slate (without any bootloader settings) by
resetting the device before we initialize it.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
drivers/spi/spi-zynqmp-gqspi.c | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c
index 549a6e0c9654..7d138f45b692 100644
--- a/drivers/spi/spi-zynqmp-gqspi.c
+++ b/drivers/spi/spi-zynqmp-gqspi.c
@@ -17,6 +17,7 @@
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/reset.h>
#include <linux/spi/spi.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
@@ -171,6 +172,7 @@ struct qspi_platform_data {
* @regs: Virtual address of the QSPI controller registers
* @refclk: Pointer to the peripheral clock
* @pclk: Pointer to the APB clock
+ * @reset: Pointer to reset controller
* @irq: IRQ number
* @dev: Pointer to struct device
* @txbuf: Pointer to the TX buffer
@@ -193,6 +195,7 @@ struct zynqmp_qspi {
void __iomem *regs;
struct clk *refclk;
struct clk *pclk;
+ struct reset_control *reset;
int irq;
struct device *dev;
const void *txbuf;
@@ -351,10 +354,17 @@ static void zynqmp_qspi_set_tapdelay(struct zynqmp_qspi *xqspi, u32 baudrateval)
* - Set clock polarity and
* - Enable the QSPI controller
*/
-static void zynqmp_qspi_init_hw(struct zynqmp_qspi *xqspi)
+static int zynqmp_qspi_init_hw(struct zynqmp_qspi *xqspi)
{
u32 config_reg, baud_rate_val = 0;
ulong clk_rate;
+ int ret;
+
+ ret = reset_control_reset(xqspi->reset);
+ if (ret) {
+ dev_err(xqspi->dev, "Unable to reset: %pe\n", &ret);
+ return ret;
+ }
/* Select the GQSPI mode */
zynqmp_gqspi_write(xqspi, GQSPI_SEL_OFST, GQSPI_SEL_MASK);
@@ -436,6 +446,8 @@ static void zynqmp_qspi_init_hw(struct zynqmp_qspi *xqspi)
/* Enable the GQSPI */
zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, GQSPI_EN_MASK);
+
+ return 0;
}
/**
@@ -1259,6 +1271,12 @@ static int zynqmp_qspi_probe(struct platform_device *pdev)
if (IS_ERR(xqspi->regs))
return PTR_ERR(xqspi->regs);
+ xqspi->reset =
+ devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(xqspi->reset))
+ return dev_err_probe(dev, PTR_ERR(xqspi->reset),
+ "could not get reset\n");
+
xqspi->pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(xqspi->pclk))
return dev_err_probe(dev, PTR_ERR(xqspi->pclk),
@@ -1300,7 +1318,9 @@ static int zynqmp_qspi_probe(struct platform_device *pdev)
xqspi->speed_hz = ctlr->max_speed_hz;
/* QSPI controller initializations */
- zynqmp_qspi_init_hw(xqspi);
+ ret = zynqmp_qspi_init_hw(xqspi);
+ if (ret)
+ goto clk_dis_all;
xqspi->irq = platform_get_irq(pdev, 0);
if (xqspi->irq < 0) {
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2025-01-16 22:55 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-16 22:55 [PATCH 0/5] spi: zynqmp-gqspi: Improve error recovery by resetting Sean Anderson
2025-01-16 22:55 ` [PATCH 1/5] dt-bindings: spi: zynqmp-qspi: Add reset Sean Anderson
2025-01-17 7:14 ` Michal Simek
2025-01-17 16:12 ` Sean Anderson
2025-01-23 22:45 ` Rob Herring
2025-01-23 22:57 ` Sean Anderson
2025-01-24 9:06 ` Michal Simek
2025-01-27 17:57 ` Rob Herring
2025-01-27 18:00 ` Sean Anderson
2025-01-16 22:55 ` Sean Anderson [this message]
2025-01-16 22:55 ` [PATCH 3/5] spi: zynqmp-gqspi: Abort operations on timeout Sean Anderson
2025-01-17 7:15 ` Michal Simek
2025-01-16 22:55 ` [PATCH 4/5] spi: zynqmp-gqspi: Allow interrupting operations Sean Anderson
2025-01-17 8:41 ` Miquel Raynal
2025-01-17 16:12 ` Sean Anderson
2025-01-16 22:55 ` [PATCH 5/5] ARM64: xilinx: zynqmp: Add QSPI reset Sean Anderson
2025-01-17 13:21 ` [PATCH 0/5] spi: zynqmp-gqspi: Improve error recovery by resetting Mark Brown
2025-01-17 16:17 ` Sean Anderson
2025-01-17 16:48 ` Mark Brown
2025-01-17 16:50 ` Sean Anderson
2025-01-17 18:31 ` Miquel Raynal
2025-01-17 18:41 ` Mark Brown
2025-01-17 21:46 ` Sean Anderson
2025-01-20 13:49 ` Mark Brown
2025-01-21 16:51 ` Sean Anderson
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