Re: [PATCH] spi: spi_amd: Add HIDDMA basic write support

[kernel test robot <lkp@intel.com>]

Hi Raju,

kernel test robot noticed the following build warnings:

[auto build test WARNING on v6.15-rc5]
[also build test WARNING on linus/master]
[cannot apply to broonie-spi/for-next next-20250509]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Raju-Rangoju/spi-spi_amd-Add-HIDDMA-basic-write-support/20250510-021954
base:   v6.15-rc5
patch link:    https://lore.kernel.org/r/20250509181737.997167-1-Raju.Rangoju%40amd.com
patch subject: [PATCH] spi: spi_amd: Add HIDDMA basic write support
config: m68k-randconfig-r111-20250511 (https://download.01.org/0day-ci/archive/20250511/202505110641.zLT16Dv7-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 14.2.0
reproduce: (https://download.01.org/0day-ci/archive/20250511/202505110641.zLT16Dv7-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202505110641.zLT16Dv7-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/spi/spi-amd.c:594:57: sparse: sparse: incorrect type in argument 2 (different address spaces) @@     expected void volatile [noderef] __iomem *addr @@     got void * @@
   drivers/spi/spi-amd.c:594:57: sparse:     expected void volatile [noderef] __iomem *addr
   drivers/spi/spi-amd.c:594:57: sparse:     got void *

vim +594 drivers/spi/spi-amd.c

   566	
   567	static void amd_spi_mem_data_out(struct amd_spi *amd_spi,
   568					 const struct spi_mem_op *op)
   569	{
   570		int base_addr = AMD_SPI_FIFO_BASE + op->addr.nbytes;
   571		u64 *buf_64 = (u64 *)op->data.buf.out;
   572		u64 addr_val = op->addr.val;
   573		u32 nbytes = op->data.nbytes;
   574		u32 left_data = nbytes;
   575		u8 *buf;
   576		int i;
   577	
   578		/*
   579		 * Condition for using HID write mode. Only for writing complete page data, use HID write.
   580		 * Use index mode otherwise.
   581		 */
   582		if (amd_spi->version == AMD_HID2_SPI && amd_is_spi_write_cmd(op->cmd.opcode)) {
   583			void *hid_base_addr = amd_spi->dma_virt_addr + op->addr.nbytes + op->cmd.nbytes;
   584	
   585			/* Write opcode and address in system memory */
   586			writeb(op->cmd.opcode, amd_spi->dma_virt_addr);
   587	
   588			for (i = 0; i < op->addr.nbytes; i++) {
   589				writeb(addr_val & GENMASK(7, 0), hid_base_addr - i - op->cmd.nbytes);
   590				addr_val >>= 8;
   591			}
   592	
   593			for (i = 0; left_data >= 8; i++, left_data -= 8)
 > 594				writeq(*buf_64++, hid_base_addr + (i * 8));
   595	
   596			buf = (u8 *)buf_64;
   597	
   598			for (i = 0; i < left_data; i++)
   599				writeb(buf[i], hid_base_addr + (nbytes - left_data + i));
   600	
   601			amd_spi_hiddma_write(amd_spi, op);
   602		} else {
   603			amd_spi_set_opcode(amd_spi, op->cmd.opcode);
   604			amd_spi_set_addr(amd_spi, op);
   605	
   606			for (i = 0; left_data >= 8; i++, left_data -= 8)
   607				amd_spi_writereg64(amd_spi, base_addr + op->dummy.nbytes + (i * 8),
   608						   *buf_64++);
   609	
   610			buf = (u8 *)buf_64;
   611			for (i = 0; i < left_data; i++) {
   612				amd_spi_writereg8(amd_spi,
   613						  base_addr + op->dummy.nbytes + nbytes + i - left_data,
   614						  buf[i]);
   615			}
   616	
   617			amd_spi_set_tx_count(amd_spi, op->addr.nbytes + op->data.nbytes);
   618			amd_spi_set_rx_count(amd_spi, 0);
   619			amd_spi_clear_fifo_ptr(amd_spi);
   620			amd_spi_execute_opcode(amd_spi);
   621		}
   622	}
   623	

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