From: Sean Anderson <sean.anderson@linux.dev>
To: Mark Brown <broonie@kernel.org>,
Michal Simek <michal.simek@amd.com>,
linux-spi@vger.kernel.org
Cc: Jinjie Ruan <ruanjinjie@huawei.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
David Lechner <dlechner@baylibre.com>,
Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>,
Sean Anderson <sean.anderson@linux.dev>,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org
Subject: [PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property
Date: Mon, 16 Jun 2025 18:00:54 -0400 [thread overview]
Message-ID: <20250616220054.3968946-10-sean.anderson@linux.dev> (raw)
In-Reply-To: <20250616220054.3968946-1-sean.anderson@linux.dev>
Add the spi-buses property to the ZynqMP devicetrees. This is pretty
simple, since all boards use the lower bus.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
(no changes since v1)
arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 1 +
arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts | 1 +
10 files changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
index bfa7ea6b9224..3d3cb656f38c 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
@@ -132,6 +132,7 @@ &qspi { /* MIO 0-5 - U143 */
spi_flash: flash@0 { /* MT25QU512A */
compatible = "jedec,spi-nor"; /* 64MB */
reg = <0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>; /* 40MHz */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
index 3dec57cf18be..f550ccea58cd 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
@@ -45,6 +45,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index 6aff22d43361..4ad5efdd40cd 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -359,6 +359,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 6ec1d9813973..26c33685b320 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -177,6 +177,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index 7e26489a1539..aa4ed3a082fa 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -958,6 +958,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index eb2090673ec1..acbe0758a31b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -444,6 +444,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index 4694d0a841f1..9b0324acbeec 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -456,6 +456,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 7beedd730f94..fd983f4c416d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -964,6 +964,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index b67ff7ecf3c3..af225413a274 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -794,6 +794,7 @@ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
index a38c2baeba6c..65790e341c15 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu1275-revA.dts
@@ -47,6 +47,7 @@ &qspi {
flash@0 {
compatible = "m25p80", "jedec,spi-nor";
reg = <0x0>;
+ spi-buses = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
--
2.35.1.1320.gc452695387.dirty
next prev parent reply other threads:[~2025-06-16 22:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-16 22:00 [PATCH v2 0/9] spi: zynqmp-gqspi: Support multiple buses and add GPIO support Sean Anderson
2025-06-16 22:00 ` [PATCH v2 1/9] dt-bindings: spi: Add spi-buses property Sean Anderson
2025-06-17 6:05 ` Krzysztof Kozlowski
2025-08-14 20:55 ` David Lechner
2025-08-14 21:15 ` Sean Anderson
2025-08-14 21:17 ` David Lechner
2025-08-14 21:34 ` Sean Anderson
2025-08-14 22:08 ` Mark Brown
2025-08-15 15:49 ` David Lechner
2025-08-18 8:28 ` Miquel Raynal
2025-08-18 14:55 ` Sean Anderson
2025-08-18 15:22 ` David Lechner
2025-08-18 14:56 ` Sean Anderson
2025-08-18 15:26 ` David Lechner
2025-06-16 22:00 ` [PATCH v2 2/9] dt-bindings: spi: zynqmp-qspi: Add example dual upper/lower bus Sean Anderson
2025-06-17 1:59 ` Rob Herring (Arm)
2025-06-18 18:27 ` David Lechner
2025-06-19 16:20 ` Sean Anderson
2025-06-19 16:29 ` David Lechner
2025-06-16 22:00 ` [PATCH v2 3/9] spi: Support multi-bus controllers Sean Anderson
2025-06-16 22:00 ` [PATCH v2 4/9] spi: Add flag to determine default bus Sean Anderson
2025-06-16 22:00 ` [PATCH v2 5/9] spi: zynqmp-gqspi: Support multiple buses Sean Anderson
2025-06-16 23:10 ` David Lechner
2025-06-17 13:21 ` kernel test robot
2025-06-16 22:00 ` [PATCH v2 6/9] spi: zynqmp-gqspi: Pass speed directly to config_op Sean Anderson
2025-06-16 22:00 ` [PATCH v2 7/9] spi: zynqmp-gqspi: Configure SPI mode dynamically Sean Anderson
2025-06-16 22:00 ` [PATCH v2 8/9] spi: zynqmp-gqspi: Support GPIO chip selects Sean Anderson
2025-06-16 22:00 ` Sean Anderson [this message]
2025-06-17 6:07 ` [PATCH v2 9/9] ARM64: xilinx: zynqmp: Add spi-buses property Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250616220054.3968946-10-sean.anderson@linux.dev \
--to=sean.anderson@linux.dev \
--cc=amit.kumar-mahapatra@amd.com \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dlechner@baylibre.com \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=michal.simek@amd.com \
--cc=miquel.raynal@bootlin.com \
--cc=robh@kernel.org \
--cc=ruanjinjie@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).