[PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net

[PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

When the binding for the Cadence spi controller was written, a dedicated
compatible was added for the zynq device. Later when zynqmp and
versal-net, which also use this spi controller IP, were added they did
not receive soc-specific compatibles. Add them now, with a fallback to
the existing compatible for the r1p6 version of the IP so that there
will be no functional change. Retain the r1p6 in the string, to match
what was done for zynq.

Disallow the cdns,spi-r1p6 compatible in isolation to "encourage" people
to actually add soc-specific compatible strings in the future.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
CC: Jun Guo <Jun.Guo@cixtech.com>
CC: Mark Brown <broonie@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Conor Dooley <conor+dt@kernel.org>
CC: Michal Simek <michal.simek@amd.com>
CC: linux-spi@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
---
 .../devicetree/bindings/spi/spi-cadence.yaml          | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
index 8de96abe9da1..27414b78d61d 100644
--- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
@@ -14,9 +14,14 @@ allOf:
 
 properties:
   compatible:
-    enum:
-      - cdns,spi-r1p6
-      - xlnx,zynq-spi-r1p6
+    oneOf:
+      - enum:
+          - xlnx,zynq-spi-r1p6
+      - items:
+          - enum:
+              - xlnx,zynqmp-spi-r1p6
+              - xlnx,versal-net-spi-r1p6
+          - const: cdns,spi-r1p6
 
   reg:
     maxItems: 1
-- 
2.47.3

[PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

Unlike zynq, which has a specific compatible for the Cadence spi
controller, zynqmp and versal-net do not have specific compatibles.
In order to "encourage" people to use soc-specific compatibles for new
devices using this IP, add specific compatibles for these devices, with
a fallback to the existing compatible for the r1p6 version of the IP so
that there will be no functional change.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
CC: Jun Guo <Jun.Guo@cixtech.com>
CC: Mark Brown <broonie@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Conor Dooley <conor+dt@kernel.org>
CC: Michal Simek <michal.simek@amd.com>
CC: linux-spi@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
---
 arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++--
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi     | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/dts/xilinx/versal-net.dtsi
index fc9f49e57385..38af1a4e34f7 100644
--- a/arch/arm64/boot/dts/xilinx/versal-net.dtsi
+++ b/arch/arm64/boot/dts/xilinx/versal-net.dtsi
@@ -610,7 +610,7 @@ smmu: iommu@ec000000 {
 		};
 
 		spi0: spi@f1960000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
 			status = "disabled";
 			interrupts = <0 23 4>;
 			reg = <0 0xf1960000 0 0x1000>;
@@ -618,7 +618,7 @@ spi0: spi@f1960000 {
 		};
 
 		spi1: spi@f1970000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
 			status = "disabled";
 			interrupts = <0 24 4>;
 			reg = <0 0xf1970000 0 0x1000>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index e11d282462bd..89c565bef274 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -1076,7 +1076,7 @@ smmu: iommu@fd800000 {
 		};
 
 		spi0: spi@ff040000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -1088,7 +1088,7 @@ spi0: spi@ff040000 {
 		};
 
 		spi1: spi@ff050000 {
-			compatible = "cdns,spi-r1p6";
+			compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
 			status = "disabled";
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.47.3

Re: [PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net

[Michal Simek]

On 10/1/25 20:31, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> When the binding for the Cadence spi controller was written, a dedicated
> compatible was added for the zynq device. Later when zynqmp and
> versal-net, which also use this spi controller IP, were added they did
> not receive soc-specific compatibles. Add them now, with a fallback to
> the existing compatible for the r1p6 version of the IP so that there
> will be no functional change. Retain the r1p6 in the string, to match
> what was done for zynq.
> 
> Disallow the cdns,spi-r1p6 compatible in isolation to "encourage" people
> to actually add soc-specific compatible strings in the future.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Jun Guo <Jun.Guo@cixtech.com>
> CC: Mark Brown <broonie@kernel.org>
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Conor Dooley <conor+dt@kernel.org>
> CC: Michal Simek <michal.simek@amd.com>
> CC: linux-spi@vger.kernel.org
> CC: devicetree@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> CC: linux-arm-kernel@lists.infradead.org
> ---
>   .../devicetree/bindings/spi/spi-cadence.yaml          | 11 ++++++++---
>   1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
> index 8de96abe9da1..27414b78d61d 100644
> --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
> @@ -14,9 +14,14 @@ allOf:
>   
>   properties:
>     compatible:
> -    enum:
> -      - cdns,spi-r1p6
> -      - xlnx,zynq-spi-r1p6
> +    oneOf:
> +      - enum:
> +          - xlnx,zynq-spi-r1p6
> +      - items:
> +          - enum:
> +              - xlnx,zynqmp-spi-r1p6
> +              - xlnx,versal-net-spi-r1p6
> +          - const: cdns,spi-r1p6
>   
>     reg:
>       maxItems: 1

Acked-by: Michal Simek <michal.simek@amd.com>

Thanks,
Michal

Re: [PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net

[Michal Simek]

On 10/1/25 20:31, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Unlike zynq, which has a specific compatible for the Cadence spi
> controller, zynqmp and versal-net do not have specific compatibles.
> In order to "encourage" people to use soc-specific compatibles for new
> devices using this IP, add specific compatibles for these devices, with
> a fallback to the existing compatible for the r1p6 version of the IP so
> that there will be no functional change.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Jun Guo <Jun.Guo@cixtech.com>
> CC: Mark Brown <broonie@kernel.org>
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Conor Dooley <conor+dt@kernel.org>
> CC: Michal Simek <michal.simek@amd.com>
> CC: linux-spi@vger.kernel.org
> CC: devicetree@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> CC: linux-arm-kernel@lists.infradead.org
> ---
>   arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++--
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi     | 4 ++--
>   2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/dts/xilinx/versal-net.dtsi
> index fc9f49e57385..38af1a4e34f7 100644
> --- a/arch/arm64/boot/dts/xilinx/versal-net.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/versal-net.dtsi
> @@ -610,7 +610,7 @@ smmu: iommu@ec000000 {
>   		};
>   
>   		spi0: spi@f1960000 {
> -			compatible = "cdns,spi-r1p6";
> +			compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
>   			status = "disabled";
>   			interrupts = <0 23 4>;
>   			reg = <0 0xf1960000 0 0x1000>;
> @@ -618,7 +618,7 @@ spi0: spi@f1960000 {
>   		};
>   
>   		spi1: spi@f1970000 {
> -			compatible = "cdns,spi-r1p6";
> +			compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
>   			status = "disabled";
>   			interrupts = <0 24 4>;
>   			reg = <0 0xf1970000 0 0x1000>;
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index e11d282462bd..89c565bef274 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -1076,7 +1076,7 @@ smmu: iommu@fd800000 {
>   		};
>   
>   		spi0: spi@ff040000 {
> -			compatible = "cdns,spi-r1p6";
> +			compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
>   			status = "disabled";
>   			interrupt-parent = <&gic>;
>   			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> @@ -1088,7 +1088,7 @@ spi0: spi@ff040000 {
>   		};
>   
>   		spi1: spi@ff050000 {
> -			compatible = "cdns,spi-r1p6";
> +			compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
>   			status = "disabled";
>   			interrupt-parent = <&gic>;
>   			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

Acked-by: Michal Simek <michal.simek@amd.com>

Do you expect to go via SPI tree or via SOC tree?

Thanks,
Michal

Re: [PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 514 bytes --]

On Thu, Oct 02, 2025 at 08:06:47AM +0200, Michal Simek wrote:
> On 10/1/25 20:31, Conor Dooley wrote:
> >   arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++--
> >   arch/arm64/boot/dts/xilinx/zynqmp.dtsi     | 4 ++--
> 
> Acked-by: Michal Simek <michal.simek@amd.com>
> 
> Do you expect to go via SPI tree or via SOC tree?

Via SOC would be preferred, there's no functional change and I don't
think the dtbs_check warnings are worth doing something abnormal, as
long as what's in linux-next is clean.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: (subset) [PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net

[Mark Brown]

On Wed, 01 Oct 2025 19:31:12 +0100, Conor Dooley wrote:
> When the binding for the Cadence spi controller was written, a dedicated
> compatible was added for the zynq device. Later when zynqmp and
> versal-net, which also use this spi controller IP, were added they did
> not receive soc-specific compatibles. Add them now, with a fallback to
> the existing compatible for the r1p6 version of the IP so that there
> will be no functional change. Retain the r1p6 in the string, to match
> what was done for zynq.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net
      commit: 4092fc5f35cecb01d59b2cdf7740b203eac6948a

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Re: [PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net

[Michal Simek]

On 10/2/25 11:44, Conor Dooley wrote:
> On Thu, Oct 02, 2025 at 08:06:47AM +0200, Michal Simek wrote:
>> On 10/1/25 20:31, Conor Dooley wrote:
>>>    arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++--
>>>    arch/arm64/boot/dts/xilinx/zynqmp.dtsi     | 4 ++--
>>
>> Acked-by: Michal Simek <michal.simek@amd.com>
>>
>> Do you expect to go via SPI tree or via SOC tree?
> 
> Via SOC would be preferred, there's no functional change and I don't
> think the dtbs_check warnings are worth doing something abnormal, as
> long as what's in linux-next is clean.

2/2 applied to Xilinx SOC tree.

Thanks,
Michal