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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eb6ccd04dsm2451454f8f.9.2026.05.22.01.19.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 May 2026 01:19:17 -0700 (PDT) Date: Fri, 22 May 2026 09:19:15 +0100 From: David Laight To: Chin-Ting Kuo Cc: , , , , , , , , , , kernel test robot Subject: Re: [PATCH v2 2/2] spi: aspeed: Replace VLA parameter with flat pointer in calibration helper Message-ID: <20260522091915.65dde4ad@pumpkin> In-Reply-To: <20260522071621.102507-3-chin-ting_kuo@aspeedtech.com> References: <20260522071621.102507-1-chin-ting_kuo@aspeedtech.com> <20260522071621.102507-3-chin-ting_kuo@aspeedtech.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Fri, 22 May 2026 15:16:21 +0800 Chin-Ting Kuo wrote: > aspeed_spi_ast2600_optimized_timing() declared its buffer argument as a > variable-length array parameter (u8 buf[rows][cols]), which causes a > sparse warning. Replace the VLA parameter with a plain u8 * and compute > the 2-D index manually. The corresponding call site is also updated. This code is all a bit horrid. The 6 and 17 (which are also used in the array declaration) have to match t= he TIMING_DELAY_HCYCLE_MAX and TIMING_DELAY_INPUT_MAX values used for the loop= s. In any case the code would be more obvious if the 'run length' of test passes was counted during the initial loop. Looks like it wants at least 4 ones, after you've got that many (and a fail) there is little point continuing the delay loop for that hcycle. -- David >=20 > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202605180441.uD3toFRJ-lkp@i= ntel.com/ > Signed-off-by: Chin-Ting Kuo > Reviewed-by: C=C3=A9dric Le Goater > --- > drivers/spi/spi-aspeed-smc.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c > index 808659a1f460..027caa2eeb5c 100644 > --- a/drivers/spi/spi-aspeed-smc.c > +++ b/drivers/spi/spi-aspeed-smc.c > @@ -1467,8 +1467,7 @@ static int aspeed_spi_do_calibration(struct aspeed_= spi_chip *chip) > * must contains the highest number of consecutive "pass" > * results and not span across multiple rows. > */ > -static u32 aspeed_spi_ast2600_optimized_timing(u32 rows, u32 cols, > - u8 buf[rows][cols]) > +static u32 aspeed_spi_ast2600_optimized_timing(u32 rows, u32 cols, u8 *b= uf) > { > int r =3D 0, c =3D 0; > int max =3D 0; > @@ -1478,7 +1477,7 @@ static u32 aspeed_spi_ast2600_optimized_timing(u32 = rows, u32 cols, > for (j =3D 0; j < cols;) { > int k =3D j; > =20 > - while (k < cols && buf[i][k]) > + while (k < cols && buf[(i * cols) + k]) > k++; > =20 > if (k - j > max) { > @@ -1541,7 +1540,7 @@ static int aspeed_spi_ast2600_calibrate(struct aspe= ed_spi_chip *chip, u32 hdiv, > } > } > =20 > - calib_point =3D aspeed_spi_ast2600_optimized_timing(6, 17, calib_res); > + calib_point =3D aspeed_spi_ast2600_optimized_timing(6, 17, &calib_res[0= ][0]); > /* No good setting for this frequency */ > if (calib_point =3D=3D 0) > return -1;