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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2d04b120f2fsm33679845ad.64.2026.08.03.00.49.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 00:49:37 -0700 (PDT) From: Chi-Wen Weng To: broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com, cwweng.linux@gmail.com Subject: [PATCH v3 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Allow additional GPIO chip selects Date: Mon, 3 Aug 2026 15:49:12 +0800 Message-Id: <20260803074913.1656675-2-cwweng.linux@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260803074913.1656675-1-cwweng.linux@gmail.com> References: <5769eae0-1b40-419f-8311-0d919bf619fa@sirena.org.uk> <20260803074913.1656675-1-cwweng.linux@gmail.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Chi-Wen Weng The MA35D1 QSPI controller provides two native chip selects, but the generic SPI controller binding defines num-cs as the total number of native and GPIO-based chip selects. Remove the maximum value of two from num-cs so that board device trees can describe additional GPIO chip selects while retaining two as the default chip-select count. Signed-off-by: Chi-Wen Weng --- Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml index 377ccf4fb224..f837367e6d5f 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml @@ -30,7 +30,6 @@ properties: num-cs: minimum: 1 - maximum: 2 default: 2 required: -- 2.25.1