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Wed, 04 Sep 2024 21:06:24 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 484L6Mj0000645 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Sep 2024 21:06:22 GMT Received: from [10.110.102.234] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 4 Sep 2024 14:06:18 -0700 Message-ID: <204f5cfe-d1ed-40dc-9175-d45f72395361@quicinc.com> Date: Wed, 4 Sep 2024 14:06:18 -0700 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 16/21] dt-bindings: spi: document support for SA8255p To: Andrew Lunn CC: Krzysztof Kozlowski , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Praveen Talari References: <20240828203721.2751904-1-quic_nkela@quicinc.com> <20240903220240.2594102-1-quic_nkela@quicinc.com> <20240903220240.2594102-17-quic_nkela@quicinc.com> <9a655c1c-97f6-4606-8400-b3ce1ed3c8bf@kernel.org> <516f17e6-b4b4-4f88-a39f-cc47a507716a@quicinc.com> <2f11f622-1a00-4558-bde9-4871cdc3d1a6@lunn.ch> Content-Language: en-US From: Nikunj Kela In-Reply-To: <2f11f622-1a00-4558-bde9-4871cdc3d1a6@lunn.ch> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: pquT8ry2dJOFwM1L5eqbhUs2RQGmgVaK X-Proofpoint-GUID: pquT8ry2dJOFwM1L5eqbhUs2RQGmgVaK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_19,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=978 priorityscore=1501 suspectscore=0 adultscore=0 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 clxscore=1011 impostorscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040160 On 9/4/2024 9:58 AM, Andrew Lunn wrote: >> Sorry, didn't realize SPI uses different subject format than other >> subsystems. Will fix in v3. Thanks > Each subsystem is free to use its own form. e.g for netdev you will > want the prefix [PATCH net-next v42] net: stmmac: dwmac-qcom-ethqos: of course they are! No one is disputing that. > > This is another reason why you should be splitting these patches per > subsystem, and submitting both the DT bindings and the code changes as > a two patch patchset. You can then learn how each subsystem names its > patches. Qualcomm QUPs chips have serial engines that can be configured as UART/I2C/SPI so QUPs changes require to be pushed in one series for all 3 subsystems as they all are dependent. > > Please pick one victim subsystem and work on the patches for just that > subsystem. Once you have them correct, you can use everything you > learned to fixup all your other patches, one by one. > > Andrew