From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Mark Brown" <broonie@kernel.org>, "Vignesh R" <vigneshr@ti.com>,
"Tudor Ambarus" <tudor.ambarus@microchip.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"Miquèl Raynal" <miquel.raynal@bootlin.com>,
"Simon Goldschmidt" <simon.k.r.goldschmidt@gmail.com>,
"Dinh Nguyen" <dinguyen@kernel.org>,
"Richard Weinberger" <richard@nod.at>,
cheol.yong.kim@intel.com, qi-ming.wu@intel.com
Subject: Re: [PATCH v5 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
Date: Fri, 6 Nov 2020 12:43:41 +0800 [thread overview]
Message-ID: <280623e3-d182-60f3-5588-96d00e573694@linux.intel.com> (raw)
In-Reply-To: <CACRpkdaz9E2yc3GnN8wus3M+qQRknW2QMe8Kn-=o=czOQf7A-Q@mail.gmail.com>
Hi,
On 5/11/2020 3:14 pm, Linus Walleij wrote:
> On Thu, Oct 29, 2020 at 8:39 AM Ramuthevar,Vadivel MuruganX
> <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
>
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>
>> Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
>> remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>
>> + cdns,is-decoded-cs:
>> + type: boolean
>> + description:
>> + Flag to indicate whether decoder is used or not.
>
> Please elaborate a bit on what kind of decoder this is.
> I am curious! :)
Sure, I will elaborate more about decoder for chip select.
QSPI controller has in-built chip select decoder instead of external
decder circuit, it supports multiple chip selection by 2-to-4 decoder,
the below combinations
CS0 - 1110
CS1 - 1101
CS2 - 1011
CS3 - 0111
when in direct access mode, each chip selection has it's own specified
memory region as well.
Regards
Vadivel
>
> Yours,
> Linus Walleij
>
next prev parent reply other threads:[~2020-11-06 4:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-29 6:20 [PATCH v5 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-29 6:20 ` [PATCH v5 1/6] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-10-29 6:20 ` [PATCH v5 2/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-10-29 6:20 ` [PATCH v5 3/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-10-29 6:20 ` [PATCH v5 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-10-29 6:20 ` [PATCH v5 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-10-29 15:59 ` Rob Herring
2020-10-29 22:14 ` Ramuthevar, Vadivel MuruganX
2020-11-05 7:14 ` Linus Walleij
2020-11-06 4:43 ` Ramuthevar, Vadivel MuruganX [this message]
2020-10-29 6:20 ` [PATCH v5 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
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