From: Michal Simek <michal.simek@amd.com>
To: Conor Dooley <conor@kernel.org>
Cc: linux-spi@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>,
Jun Guo <Jun.Guo@cixtech.com>, Mark Brown <broonie@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net
Date: Mon, 13 Oct 2025 08:36:45 +0200 [thread overview]
Message-ID: <39e66166-32a1-43db-8d80-143fa288a71b@amd.com> (raw)
In-Reply-To: <20251002-unloving-unrobed-b35543f729f2@spud>
On 10/2/25 11:44, Conor Dooley wrote:
> On Thu, Oct 02, 2025 at 08:06:47AM +0200, Michal Simek wrote:
>> On 10/1/25 20:31, Conor Dooley wrote:
>>> arch/arm64/boot/dts/xilinx/versal-net.dtsi | 4 ++--
>>> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
>>
>> Acked-by: Michal Simek <michal.simek@amd.com>
>>
>> Do you expect to go via SPI tree or via SOC tree?
>
> Via SOC would be preferred, there's no functional change and I don't
> think the dtbs_check warnings are worth doing something abnormal, as
> long as what's in linux-next is clean.
2/2 applied to Xilinx SOC tree.
Thanks,
Michal
next prev parent reply other threads:[~2025-10-13 6:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-01 18:31 [PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net Conor Dooley
2025-10-01 18:31 ` [PATCH v1 2/2] arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net Conor Dooley
2025-10-02 6:06 ` Michal Simek
2025-10-02 9:44 ` Conor Dooley
2025-10-13 6:36 ` Michal Simek [this message]
2025-10-02 6:05 ` [PATCH v1 1/2] spi: dt-bindings: cadence: add soc-specific compatible strings for zynqmp and versal-net Michal Simek
2025-10-02 15:44 ` (subset) " Mark Brown
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