From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0826E1DF756 for ; Tue, 28 Jan 2025 09:18:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738055908; cv=none; b=hB4SE6RyTFinh9JTM/n+nLlcuMVLy0Z2BRZSJNZmX8kAN4wFuuNyKyBHcdKdyiFG811Kjf2yXIHN84CgqC5eYC17jxDRKtzFC3zZomj9vfblYWbjR8Dg0lSAvq1NFgX5dZxSmO6zUMDMgIqz263VU16tgIt1MNJGmF1tuZYWzTg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738055908; c=relaxed/simple; bh=16YnyOH7xom0w8z7EmJ1N0PdsPQqvXJ8xXyEPUZ0THg=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=t4B7oMBvjCqtYcX1oN5tPxUeMib2BKcIInlXd/RqaLeAaBClPYxM2p3wa+J+jOXrnUCQd0XDG1Ygsz4WeQwatfFywxJUlFaLwlyd0rXzLDmN7ira0fxFVxTkpqdHgY2dkKKY2qHW7Z7JoAtRwOBo3WB3hRiKVmOmzA5U+MWh4Nk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1tchjI-0002II-Ly; Tue, 28 Jan 2025 10:17:56 +0100 Received: from lupine.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::4e] helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tchjH-002Gpb-1q; Tue, 28 Jan 2025 10:17:55 +0100 Received: from pza by lupine with local (Exim 4.96) (envelope-from ) id 1tchjH-0001lT-1Y; Tue, 28 Jan 2025 10:17:55 +0100 Message-ID: <3d6cfb082ef8ee0fc66c885a84f64ae0a851234b.camel@pengutronix.de> Subject: Re: [PATCH v2 4/9] memory: Add STM32 Octo Memory Manager driver From: Philipp Zabel To: patrice.chotard@foss.st.com, Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Maxime Coquelin , Greg Kroah-Hartman , Arnd Bergmann , Catalin Marinas , Will Deacon Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com Date: Tue, 28 Jan 2025 10:17:55 +0100 In-Reply-To: <20250128081731.2284457-5-patrice.chotard@foss.st.com> References: <20250128081731.2284457-1-patrice.chotard@foss.st.com> <20250128081731.2284457-5-patrice.chotard@foss.st.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-spi@vger.kernel.org On Di, 2025-01-28 at 09:17 +0100, patrice.chotard@foss.st.com wrote: > From: Patrice Chotard >=20 > Octo Memory Manager driver (OMM) manages: > - the muxing between 2 OSPI busses and 2 output ports. > There are 4 possible muxing configurations: > - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI= 2 > output is on port 2 > - OSPI1 and OSPI2 are multiplexed over the same output port 1 > - swapped mode (no multiplexing), OSPI1 output is on port 2, > OSPI2 output is on port 1 > - OSPI1 and OSPI2 are multiplexed over the same output port 2 > - the split of the memory area shared between the 2 OSPI instances. > - chip select selection override. > - the time between 2 transactions in multiplexed mode. > - check firewall access. >=20 > Signed-off-by: Patrice Chotard > Signed-off-by: Christophe Kerello > --- > drivers/memory/Kconfig | 17 ++ > drivers/memory/Makefile | 1 + > drivers/memory/stm32_omm.c | 509 +++++++++++++++++++++++++++++++++++++ > 3 files changed, 527 insertions(+) > create mode 100644 drivers/memory/stm32_omm.c >=20 [...] > diff --git a/drivers/memory/stm32_omm.c b/drivers/memory/stm32_omm.c > new file mode 100644 > index 000000000000..6f20fe0183ec > --- /dev/null > +++ b/drivers/memory/stm32_omm.c > @@ -0,0 +1,509 @@ [...] > +static int stm32_omm_configure(struct device *dev) > +{ > + struct stm32_omm *omm =3D dev_get_drvdata(dev); > + struct reset_control *rstc; > + unsigned long clk_rate, clk_rate_max =3D 0; > + int ret; > + u8 i; > + u32 mux =3D 0; > + u32 cssel_ovr =3D 0; > + u32 req2ack =3D 0; > + > + omm->clk =3D devm_clk_get(dev, NULL); > + if (IS_ERR(omm->clk)) { > + dev_err(dev, "Failed to get OMM clock (%ld)\n", > + PTR_ERR(omm->clk)); > + > + return PTR_ERR(omm->clk); > + } > + > + ret =3D pm_runtime_resume_and_get(dev); > + if (ret < 0) > + return ret; > + > + /* parse children's clock */ > + for (i =3D 0; i < omm->nb_child; i++) { > + clk_rate =3D clk_get_rate(omm->child[i].clk); > + if (!clk_rate) { > + dev_err(dev, "Invalid clock rate\n"); > + goto err_clk_disable; > + } > + > + if (clk_rate > clk_rate_max) > + clk_rate_max =3D clk_rate; > + } > + > + rstc =3D devm_reset_control_get_optional(dev, NULL); Please use devm_reset_control_get_optional_exclusive() directly. regards Philipp