From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3635428FA99; Fri, 9 May 2025 11:26:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746789988; cv=none; b=BZZRL8S7Sl186xqLjY3qI7qqDViM01WOTx6ZjqvkX5IkV4E/1YTzcGolT2XqNZKG4GQN3TWt7QSNMqeyyytIuhf909uYxlx/RvCXBa9kYSk9GJIwCXtYCZyeQ+MbdtQ8tc8ZO2k1+tzLpooJlOJvoJch+J8Eci4F7XU9Dx345fM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746789988; c=relaxed/simple; bh=hzLS1kXe+h9iNMiiyoZn+cOfweZp3O9xMdrElxq55yA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=YJJRZjoVKrVHQX1xpZKSaVFaoU/JgLmchmRYgGpdrg+x6S7z1CVwEPuTLZv116HY+Y7dp+uLi8GFkOuhsVqJ9uNsZQII9wJnULeHeC1OKxuj3DSZibez4Mz7ZkyEWd5orXPZVWiE+nOuIJvdiOYafDxDGn97U1mMlmGoytxGwew= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=X/W5IgPQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="X/W5IgPQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 306F8C4CEE4; Fri, 9 May 2025 11:26:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746789987; bh=hzLS1kXe+h9iNMiiyoZn+cOfweZp3O9xMdrElxq55yA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=X/W5IgPQzAckzO/++fEBxwjg3pQP0vPff3cu0Dxhfr33pO6EJnBpJWZIzACDdY9ZL xeVkXUlMRyb+xJnth6Ud/bnE7zO8iRsFxnSGKiGIJlsXm6R87oughaoQ9gaBTdzHyB TaQajUFSNrSQk6Dw9EQGN6MdaA2pMpWIEOLcro7zN0h4abcDHLEKvJhJ+7UKMd1z+t sYRR7bGqZ5/5EE3d35JXABRExqEiB+VVB9ezEUyTbt+7yMeYFjl2IP7/91h8Z+Xucl eTs1mDfp0hXc53vsEpSoBFHdIjVa3fCOTfGesOT+BP0wubtsQkBP2hL5+ojKgM2O3P EeOslwo0d7DXw== Message-ID: <3ddde799-76b5-43f9-971e-a52ec322e9b1@kernel.org> Date: Fri, 9 May 2025 13:26:20 +0200 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 14/14] arm64: dts: Add DSPI entries for S32G platforms To: James Clark , Vladimir Oltean , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , larisa.grigore@nxp.com, arnd@linaro.org, andrei.stefanescu@nxp.com, dan.carpenter@linaro.org Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "Radu Pirea (NXP OSS)" References: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org> <20250509-james-nxp-spi-v1-14-32bfcd2fea11@linaro.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 09/05/2025 13:06, James Clark wrote: > +&spi1 { > + pinctrl-0 = <&dspi1_pins>; > + pinctrl-names = "default"; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; > + > + spidev0: spidev@0 { Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > + compatible = "rohm,dh2228fv"; Nah, I really doubt. That's not the device you have there. It's possible, though, so can you share schematics? > + spi-max-frequency = <4000000>; > + reg = <0>; > + fsl,spi-cs-sck-delay = <100>; > + fsl,spi-sck-cs-delay = <100>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi > index ba53ec622f0b..798b58fa9536 100644 > --- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi > +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi > @@ -127,6 +127,77 @@ i2c4-gpio-grp1 { > pinmux = <0x2d40>, <0x2d30>; > }; > }; > + > + dspi1_pins: dspi1_pins { No underscores in node names. Please use upstream as basis of your changes, not downstream code. See also DTS coding style. Best regards, Krzysztof