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AJvYcCXLf0MPIRk10x6bj6u3b6da3wejMA5x3JM58gPrlOlkg85bOKjB0EDaF3A7e7PKKRpNcosJghx2l+0=@vger.kernel.org X-Gm-Message-State: AOJu0Yy2IfH3aay/j8LOVUIrl8TenCTUkMXHxCtphgHxoot3VFHkN0Gk 1xKbqUrygHgUtVG1zXRaOObcrP3F5LVa++R/ruelvKbKXTxIix/MWHVL/MV+muM= X-Google-Smtp-Source: AGHT+IFag61yfodkZmr5TS3cmwy+FvF75Uec4Yswjg4hxvXQDmRP7g7+z1T2wq5sRQC78AQ1tGkGKw== X-Received: by 2002:a17:907:7205:b0:a99:60c8:f2c4 with SMTP id a640c23a62f3a-a9eeff0d8d4mr1261372366b.15.1731333043626; Mon, 11 Nov 2024 05:50:43 -0800 (PST) Received: from [192.168.0.157] ([79.115.63.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9ee0ad2f76sm591418266b.89.2024.11.11.05.50.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Nov 2024 05:50:43 -0800 (PST) Message-ID: <48c1512e-91f4-42f2-a935-b5b8b1506d0a@linaro.org> Date: Mon, 11 Nov 2024 13:50:41 +0000 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/24] spi: cadence-qspi: Support per spi-mem operation frequency switches To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Pratyush Yadav , Michael Walle , linux-mtd@lists.infradead.org Cc: Mark Brown , linux-spi@vger.kernel.org, Steam Lin , Thomas Petazzoni , Sanjay R Mehta , Han Xu , Conor Dooley , Daire McNamara , Matthias Brugger , AngeloGioacchino Del Regno , Haibo Chen , Yogesh Gaur , Heiko Stuebner , Michal Simek References: <20241025161501.485684-1-miquel.raynal@bootlin.com> <20241025161501.485684-6-miquel.raynal@bootlin.com> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20241025161501.485684-6-miquel.raynal@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/25/24 5:14 PM, Miquel Raynal wrote: > Every ->exec_op() call correctly configures the spi bus speed to the > maximum allowed frequency for the memory using the constant spi default > parameter. Since we can now have per-operation constraints, let's use > the value that comes from the spi-mem operation structure instead. In > case there is no specific limitation for this operation, the default spi > device value will be given anyway. > > The per-operation frequency capability is thus advertised to the spi-mem > core. > > Signed-off-by: Miquel Raynal Reviewed-by: Tudor Ambarus