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From: Kenneth Heitke <kheitke-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Niclas Karlsson <niclas.karlsson-h3aQMNCITb4@public.gmane.org>
Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
Subject: Re: Getting alot of zero values from ads7846 using atmel_spi
Date: Wed, 20 Apr 2011 15:11:46 -0600	[thread overview]
Message-ID: <4DAF4C12.6090100@codeaurora.org> (raw)
In-Reply-To: <1303310097.19857.123.camel@SESTOWS194>

On 04/20/2011 08:34 AM, Niclas Karlsson wrote:
> tis 2011-04-19 klockan 14:40 -0600 skrev Kenneth Heitke:
>> On 04/18/2011 03:21 AM, Niclas Karlsson wrote:
>>> tor 2011-03-10 klockan 15:41 +0100 skrev David Lamparter:
>>>> On Tue, Mar 08, 2011 at 10:44:56AM +0100, Niclas Karlsson wrote:
>>>>> Do anyone know why I read so many zeroes?
>>>>
>>>> You're probably reading values faster than the chip supports. Check the
>>>> chip documentation for a maximum readout frequency or a ready flag.
>>>>> I have made some printk in ads7846.c to trace the problem. It seemed to
>>>>> read more correct values when I added the printks.
>>>>
>>>> A printk takes quite some time on an ARM like yours. The throttle makes
>>>> it work...
>>>
>>> I've made som further investigations. The atmel_spi.c driver utilize PDC
>>> (Peripheral DMA Controller) and when I was tracing the problem I
>>> discovered that the interrupt indicating the PDC has written the data to
>>> memory is fired before the data actually is written to memory. If a
>>> small delay is added after the interrupt (like a trace printk("The value
>>> is\n")) the PDC have enough time to write the data to the memory and I
>>> get correct values from the ADC connected to the SPI.
>>> Thoughts how to solve this?
>>
>> Is it really the interrupt firing early or is it possible that you are
>> still reading cached data.  I'm not familiar with the device or driver
>> so I'm just throwing that out as a possibility.
> I have thought about it but I don't know how to test it. I disabled the
>   whole d-cache in the kernel configuration, but everything ran so slow
> that I don't know if it was the disabled of d-cache or if the timing
> became so much different.
> If I want to bring the d-cache up to sync, how do I do that?
> Is it possible to allocate memory which never will be stored in d-cache?
> /Niclas


You might want to take a look at dma_alloc_coherent()

>>>>
>>>>
>>>> David
>>>>
>>>> P.S.: you're lucky to not get crap values - seems they got the chip
>>>> design right...
>>>>
>>> /Niclas
>>> ------------------------------------------------------------------------------
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>>> spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
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>>>
>>
>>
>
>


-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

------------------------------------------------------------------------------
Benefiting from Server Virtualization: Beyond Initial Workload 
Consolidation -- Increasing the use of server virtualization is a top
priority.Virtualization can reduce costs, simplify management, and improve 
application availability and disaster protection. Learn more about boosting 
the value of server virtualization. http://p.sf.net/sfu/vmware-sfdev2dev

      reply	other threads:[~2011-04-20 21:11 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-08  9:44 Getting alot of zero values from ads7846 using atmel_spi Niclas Karlsson
2011-03-10 14:41 ` David Lamparter
     [not found]   ` <20110310144145.GB4093601-sd4rSCkhOesKVZNVnti56SRbHCANfdcW@public.gmane.org>
2011-04-18  9:21     ` Niclas Karlsson
2011-04-19 20:40       ` Kenneth Heitke
     [not found]         ` <4DADF35B.2000600-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2011-04-20 14:34           ` Niclas Karlsson
2011-04-20 21:11             ` Kenneth Heitke [this message]

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