From mboxrd@z Thu Jan 1 00:00:00 1970 From: viresh kumar Subject: Re: [QUERY] Behavior of spi slave memories w.r.t chip select signal. Date: Wed, 11 May 2011 12:49:42 +0530 Message-ID: <4DCA388E.5060003@st.com> References: <4DCA0B77.8060700@st.com> <20110511071754.GN26703@pulham.picochip.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Dinesh Kumar SHARMA , Linus WALLEIJ , Armando VISCONTI , Shiraz HASHIM , "spi-devel-general@lists.sourceforge.net" , Vikas MANOCHA , "linux-arm-kernel@lists.infradead.org" To: Jamie Iles Return-path: In-Reply-To: <20110511071754.GN26703@pulham.picochip.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: linux-spi.vger.kernel.org On 05/11/2011 12:47 PM, Jamie Iles wrote: > What SPI controller are you using? I've seen a similar issue with the > Synopsys DesignWare SPI controller where the controller manages the chip > select itself, and once the FIFO is emptied the CS goes away, but the > flash chip requires it to stay high for the whole transaction. In this > case the workaround is to use a GPIO as a chip select and there are > other controllers that do the same thing for the same reason (I think > that pxa2xx_spi is one of them). I am using amba pl022 controller and using external gpio's to control chip select signal. cs is kept low for entire message, but still i am facing this issue. -- viresh