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From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: Jagan Teki <jagannadh.teki-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	<angus.clark-qxv4g6HH51o@public.gmane.org>,
	<shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	<b44548-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	<broonie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	<linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<b18965-KZfg59tc24xl57MIdRCFDg@public.gmane.org>,
	<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"Gupta, Pekon" <pekon-l0cyMroinI0@public.gmane.org>,
	Sourav Poddar <sourav.poddar-l0cyMroinI0@public.gmane.org>,
	Brian Norris
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	<lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v4 0/7] mtd: spi-nor: add a new framework for SPI NOR
Date: Thu, 16 Jan 2014 17:11:19 +0800	[thread overview]
Message-ID: <52D7A237.8@freescale.com> (raw)
In-Reply-To: <CAD6G_RTnNQgeJM8Tc16Sc1_n29d=V9sJN1ePrOAn5YzM+GujMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

于 2014年01月16日 03:15, Jagan Teki 写道:
> Hi,
>
> On Wed, Dec 25, 2013 at 11:20 AM, Huang Shijie<b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>  wrote:
>> 1.) Why add a new framework for SPI NOR?
>>    The SPI-NOR controller such as Freescale's Quadspi controller is working
>>    in a different way from the SPI bus. It should knows the NOR commands to
>>    find the right LUT sequence. Unfortunately, the current code can not meet
>>    this requirement.
>>
>> 2.) How does this patch set do?
>>     This patch set adds a new spi-nor layer.
>>     Before this patch, the layer is like:
>>
>>                     MTD
>>           ------------------------
>>                    m25p80
>>           ------------------------
>>                 spi bus driver
>>           ------------------------
>>                  SPI NOR chip
>>
>>     After this patch, the layer is like:
>>                     MTD
>>           ------------------------
>>                    spi-nor
>>           ------------------------
>>                    m25p80
>>           ------------------------
>>                 spi bus driver
>>           ------------------------
>>                 SPI NOR chip
>>
>>    With the spi-nor controller driver(Freescale Quadspi), it looks like:
>>                     MTD
>>           ------------------------
>>                    spi-nor
>>           ------------------------
>>                  fsl-quadspi
>>           ------------------------
>>                 SPI NOR chip
> I'm new to this thread, may be I'll ask basic questions.
> 1) what does m25p80 contains with your new framework - will excludes
> quad stuff if they add
sorry, i do not understand your meaning.

do you think the m25p80 can not support the quad read after this patch set?


> 2) I didn't understand why the controller driver fsl-quadspi will be
> in mtd becuase as it's (q)spi driver
> may does flash or non-flash functionalities if ie, the case should be
> part of drivers/spi/*
Please read this thread, Mark though it should be spi nor driver:

http://marc.info/?l=linux-arm-kernel&m=137782885415953&w=2
> 3) Can you explain your framework precisely take an example of like
> spi_controller_A with spi_flash_A
> and qspi_controller_B and qspi_flash_B - how will this new framework operates.
>
The framework is just cloned from the m25p80.c, and extract the common 
code, and provides more
hooks such as

@prepare/unpreare: used to do some work before or after the
              read/write/erase/lock/unlock.
     @read_xfer/write_xfer: We can use these two hooks to code all
              the following hooks if the driver tries to implement them
              by itself.
     @read_reg: used to read the registers, such as read status register,
              read configure register.
     @write_reg: used to write the registers, such as write enable,
              erase sector.
     @read_id: read out the ID info.
     @wait_till_ready: wait till the NOR becomes ready.
     @read: read out the data from the NOR.
     @write: write data to the NOR.
     @erase: erase a sector of the NOR.



The drivers can implement these hooks.

thanks
Huang Shijie






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  parent reply	other threads:[~2014-01-16  9:11 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-25  5:50 [PATCH v4 0/7] mtd: spi-nor: add a new framework for SPI NOR Huang Shijie
     [not found] ` <1387950629-27448-1-git-send-email-b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2013-12-25  5:50   ` [PATCH v4 1/7] mtd: spi-nor: copy the SPI NOR commands to a new header file Huang Shijie
2013-12-25  5:50   ` [PATCH v4 2/7] mtd: spi-nor: add the basic data structures Huang Shijie
2013-12-25  5:50   ` [PATCH v4 3/7] mtd: spi-nor: add the framework for SPI NOR Huang Shijie
2013-12-25  5:50   ` [PATCH v4 4/7] mtd: m25p80: use the SPI nor framework Huang Shijie
2013-12-25  5:50   ` [PATCH v4 5/7] mtd: spi-nor: add a helper to find the spi_device_id Huang Shijie
2013-12-25  5:50   ` [PATCH v4 6/7] Documentation: add the binding file for Freescale QuadSPI driver Huang Shijie
2013-12-25  5:50 ` [PATCH v4 7/7] mtd: spi-nor: Add " Huang Shijie
2014-01-15 19:15 ` [PATCH v4 0/7] mtd: spi-nor: add a new framework for SPI NOR Jagan Teki
     [not found]   ` <CAD6G_RTnNQgeJM8Tc16Sc1_n29d=V9sJN1ePrOAn5YzM+GujMQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-16  9:11     ` Huang Shijie [this message]
     [not found]       ` <52D7A237.8-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-01-16  9:39         ` Jagan Teki
     [not found]           ` <CAD6G_RRNg-uRtKnnVgJYpUGPsKecAUm9mwETVJsCsaGSuL2eCw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-17  2:02             ` Huang Shijie
2014-01-17  7:06               ` Jagan Teki
     [not found]                 ` <CAD6G_RR7vgmHGFj4GqwCYLQQO6tbsZAeCzVBivbcxnCGSwgiWQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-17  6:54                   ` Huang Shijie
2014-01-17  8:39                     ` Jagan Teki
2014-01-17 17:06                       ` Jagan Teki
2014-01-17 17:40                         ` Gupta, Pekon
2014-01-19  2:44                           ` Huang Shijie
2014-01-19  2:28                       ` Huang Shijie
     [not found]                         ` <52DB3864.2040606-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-19 10:09                           ` Jagan Teki
     [not found]                             ` <CAD6G_RTwMJ5DgkCB7wcYw+2p---DqU4KCVJ3CUnHFfCJ0ui_Jw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-01-21  2:29                               ` Huang Shijie
2014-01-17  7:17                 ` sourav

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