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From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Mark Brown <broonie@kernel.org>,
	Linux-sh list <linux-sh@vger.kernel.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: Re: [PATCH] spi: sh-msiof: Fix limit maximum word transfer size of FIFO size
Date: Wed, 18 Mar 2015 12:50:31 +0900	[thread overview]
Message-ID: <5508F607.7010104@renesas.com> (raw)
In-Reply-To: <CAMuHMdWVRCpF72tS7pQc-cwSMTU-mbqJWtjPtjDSe8YNo-dpqw@mail.gmail.com>

Hi,

(2015/03/16 16:50), Geert Uytterhoeven wrote:
> Hi Iwamatsu-san,
>
> On Mon, Mar 16, 2015 at 2:18 AM, Nobuhiro Iwamatsu
> <nobuhiro.iwamatsu.yj@renesas.com>  wrote:
>> 2015-03-12 21:35 GMT+09:00 Geert Uytterhoeven<geert@linux-m68k.org>:
>>> On Thu, Mar 12, 2015 at 3:31 AM, Nobuhiro Iwamatsu
>>> <nobuhiro.iwamatsu.yj@renesas.com>  wrote:
>
>>>> -       /* limit maximum word transfer to rx/tx fifo size */
>>>> -       if (tx_buf)
>>>> -               words = min_t(int, words, p->tx_fifo_size);
>>>> -       if (rx_buf)
>>>> -               words = min_t(int, words, p->rx_fifo_size);
>
>>> Sorry, I fail to see what exactly this is fixing.
>>>
>>> If SPI_MASTER_MUST_TX is set, all hardware SPI transfers are either
>>>    a) transmit-only.
>>>    b) bidirectional (transmit buffer may be a dummy, provided by the SPI core).
>>>
>>> For case a, only the TX FIFO size matters.
>>>    - The original code ignored the RX FIFO size (rx_buf == NULL),
>>>    - After your change, it always uses the minimum of the TX and RX FIFO sizes
>>>      (granted, the RX FIFO size is larger, so this doesn't make a difference on
>>>      current hardware).
>>
>> Yes.
>>
>>>
>>> For case b, both FIFO sizes matter, and the original code handled that fine
>>> (tx_buf != NULL, rx_buf != NULL).
>>>
>>> What am I missing?
>>> Are you using a backport with broken SPI_MASTER_MUST_TX handling in the SPI
>>> core?
>>
>> When tx_buf != NULL and rx_buf != NULL, current code uses FIFO size of
>> rx_buffer.
>> Since TX FIFO size is smaller than RX FIFO  size, corrent code set the
>> wrong value to SITMDR2 register.
>
> if tx_buf != NULL and rx_buf != NULL, current code does:
>
>      words = min_t(int, words, p->tx_fifo_size);
>      words = min_t(int, words, p->rx_fifo_size);
>
> Hence words will be the minimum of the original value of words, tx_fifo_size,
> and rx_fifo_size. What's wrong about that?
>

I see. I understood about this.
Sorry, my bad.

Mark, if you do not apply this patch to your repository, could you ignore this?

>> Therefore, this patch selects a smaller FIFO size, adds the function to set.
>>
>> Does this has become a description?
>>
>>>
>>> I've just verified that with today's tree (renesas-drivers-2015-03-12-v4.0-rc3),
>>> SPI_MASTER_MUST_TX works fine, and a dummy tx_buf is passed when needed.
>>
>> I think correctly work on hardware. However, driver has been set to
>> the correct register value?
>
> I printed the value of words, which is passed to sh_msiof_spi_set_mode_regs().
>
> Gr{oetje,eeting}s,
>
>                          Geert
>

Best regards,
   Nobuhiro

  reply	other threads:[~2015-03-18  3:50 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-12  2:31 [PATCH] spi: sh-msiof: Fix limit maximum word transfer size of FIFO size Nobuhiro Iwamatsu
2015-03-12 11:37 ` Mark Brown
2015-03-12 12:35 ` Geert Uytterhoeven
2015-03-12 16:00   ` Mark Brown
     [not found]   ` <CAMuHMdXmr7QH8jSkyH2q6xCise7ew5YzyAFc6Zb0psHZt3mGrg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-16  1:18     ` Nobuhiro Iwamatsu
2015-03-16  7:50       ` Geert Uytterhoeven
2015-03-18  3:50         ` Nobuhiro Iwamatsu [this message]
     [not found]           ` <5508F607.7010104-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
2015-03-18 10:51             ` Mark Brown

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