Re: [PATCH 1/4] devicetree: add binding documentation for the AR7100 SPI controller

[Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>]

Hello.

On 04/24/2015 05:19 PM, Alban Bedel wrote:

> Signed-off-by: Alban Bedel <albeu-GANU6spQydw@public.gmane.org>
> ---
>   .../devicetree/bindings/spi/spi-ath79.txt          | 24 ++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/spi/spi-ath79.txt

> diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt
> new file mode 100644
> index 0000000..f1ad9c3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-ath79.txt
> @@ -0,0 +1,24 @@
> +Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
> +
> +Required properties:
> +- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
> +- reg: Base address and size of the controllers memory area
> +- clocks: phandle to the AHB clock.

    s/to/of/?

> +- clock-names: has to be "ahb".
> +- #address-cells: <1>, as required by generic SPI binding.
> +- #size-cells: <0>, also as required by generic SPI binding.
> +
> +Child nodes as per the generic SPI binding.
> +
> +Example:
> +
> +	spi@1F000000 {

    All lowercase, please.

> +		compatible = "qca,ar9132-spi", "qca,ar7100-spi";
> +		reg = <0x1F000000 0x10>;

    Likewise.

[...]

WBR, Sergei

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