Re: [PATCH 4/7] Documentation: mtd: add a DT property to set the latency code of Spansion memory

[Cyrille Pitchen <cyrille.pitchen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>]

Hi Marek,

Le 16/07/2015 19:44, Marek Vasut a écrit :
> On Thursday, July 16, 2015 at 05:27:51 PM, Cyrille Pitchen wrote:
> 
> Hi!
> 
>> Both the SPI controller and the NOR flash memory need to agree on the
>> number of dummy cycles to use for Fast Read commands. For Spansion
>> memories, this number of dummy cycles is not given directly but through a
>> so called "latency code".
>> The latency code can be found into the memory datasheet and depends on the
>> SPI clock frequency, the Fast Read op code and the Single/Dual Data Rate
>> mode.
> 
> Shouldn't you be able to derive the latency code from the above information,
> which you already know then ?
Yes I agree with you; this could have been done adding static tables inside the
driver instead of creating a new DT property dedicated to Spansion memories.

When I wrote this patch, I had a close look at the s25fl512s datasheet but only
overviewed few datasheets for other Spansion QSPI flash memories. So I don't
know whether a single latency code table could be shared among all Spansion
memories or many tables should be added to support different memory models.

That's why I've chosen to add a dedicated DT property to support Spansion
memories as it avoids to add tables to guess the proper latency code to be
used. I thought it would be more flexible.

Maybe I will remove the support of Spansion QSPI memories from this series for
now. Their support can still be implemented later.

Anyway, thanks for your review :)

> 
> Best regards,
> Marek Vasut
> 

Best Regards,

Cyrille
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