From: Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
b38343-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
vladimir_zapolskiy-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org,
jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH v5 05/11] spi: imx: Add support for loopback for ECSPI controllers
Date: Mon, 7 Dec 2015 22:58:23 +0100 [thread overview]
Message-ID: <566600FF.1040905@gmail.com> (raw)
In-Reply-To: <20151207092747.GA11966-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
On 2015-12-07 10:27, Sascha Hauer wrote:
> On Sat, Dec 05, 2015 at 05:57:03PM +0100, Anton Bondarenko wrote:
>> Support for ECSPI loopback for IMX51, IMX53 and IMX6Q using TEST register.
>>
>> Signed-off-by: Mohsin Kazmi <mohsin_kazmi-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
>> Signed-off-by: Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>> drivers/spi/spi-imx.c | 19 ++++++++++++++++---
>> 1 file changed, 16 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
>> index 363276d..3525616 100644
>> --- a/drivers/spi/spi-imx.c
>> +++ b/drivers/spi/spi-imx.c
>> @@ -246,6 +246,9 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
>> #define MX51_ECSPI_STAT 0x18
>> #define MX51_ECSPI_STAT_RR (1 << 3)
>>
>> +#define MX51_ECSPI_TEST 0x20
>> +#define MX51_ECSPI_LOOP BIT(31)
>> +
>> /* MX51 eCSPI */
>> static unsigned int mx51_ecspi_clkdiv(unsigned int fin, unsigned int fspi,
>> unsigned int *fres)
>> @@ -316,6 +319,7 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
>> u32 ctrl = MX51_ECSPI_CTRL_ENABLE, cfg = 0, dma = 0;
>> u32 tx_wml_cfg, rx_wml_cfg, rxt_wml_cfg;
>> u32 clk = config->speed_hz, delay;
>> + u32 lpb = 0;
>>
>> /*
>> * The hardware seems to have a race condition when changing modes. The
>> @@ -356,6 +360,12 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
>> writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
>> writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);
>>
>> + if (config->mode & SPI_LOOP)
>> + lpb |= MX51_ECSPI_LOOP;
>> +
>> + if ((readl(spi_imx->base + MX51_ECSPI_TEST) & MX51_ECSPI_LOOP) != lpb)
>> + writel(lpb, spi_imx->base + MX51_ECSPI_TEST);
>> +
>> /*
>> * Wait until the changes in the configuration register CONFIGREG
>> * propagate into the hardware. It takes exactly one tick of the
>> @@ -1128,6 +1138,9 @@ static int spi_imx_probe(struct platform_device *pdev)
>> spi_imx = spi_master_get_devdata(master);
>> spi_imx->bitbang.master = master;
>>
>> + spi_imx->devtype_data = of_id ? of_id->data :
>> + (struct spi_imx_devtype_data *)pdev->id_entry->driver_data;
>> +
>> for (i = 0; i < master->num_chipselect; i++) {
>> int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);
>> if (!gpio_is_valid(cs_gpio) && mxc_platform_info)
>> @@ -1154,10 +1167,10 @@ static int spi_imx_probe(struct platform_device *pdev)
>> spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message;
>> spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
>>
>> - init_completion(&spi_imx->xfer_done);
>> + if (is_imx51_ecspi(spi_imx))
>> + spi_imx->bitbang.master->mode_bits |= SPI_LOOP;
>>
>> - spi_imx->devtype_data = of_id ? of_id->data :
>> - (struct spi_imx_devtype_data *) pdev->id_entry->driver_data;
>> + init_completion(&spi_imx->xfer_done);
>
> Some unrelated lines are moved in these two hunks. Is this necessary or
> just some leftover from development?
>
> Sascha
>
Sascha,
This is necessary because is_imx51_ecspi function is base on content of
spi_imx->devtype_data (see previous commit PATCH v5 04/11). I could try
to move SPI_LOOP mode bit set to avoid change for completion initialization.
Regards, Anton
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next prev parent reply other threads:[~2015-12-07 21:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-05 16:56 [PATCH v5 00/11] Improvements for SPI IMX driver for Freescale IMX51, IMX53 and IMX6 Anton Bondarenko
2015-12-05 16:56 ` [PATCH v5 01/11] spi: imx: terminate RX DMA transaction in case of TX DMA timeout Anton Bondarenko
[not found] ` <1449334629-4715-2-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: terminate RX DMA transaction in case of TX DMA timeout" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 03/11] spi: imx: replace multiple watermarks with single for RX, TX and RXT Anton Bondarenko
[not found] ` <1449334629-4715-4-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: replace multiple watermarks with single for RX, TX and RXT" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 04/11] spi: imx: add function to check for IMX51 family controller Anton Bondarenko
[not found] ` <1449334629-4715-5-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: add function to check for IMX51 family controller" to the spi tree Mark Brown
[not found] ` <1449334629-4715-1-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-05 16:57 ` [PATCH v5 02/11] spi: imx: reorder HW operations enable order to avoid possible RX data loss Anton Bondarenko
[not found] ` <1449334629-4715-3-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 19:54 ` Applied "spi: imx: reorder HW operations enable order to avoid possible RX data loss" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 05/11] spi: imx: Add support for loopback for ECSPI controllers Anton Bondarenko
[not found] ` <1449334629-4715-6-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 9:27 ` Sascha Hauer
[not found] ` <20151207092747.GA11966-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-12-07 21:58 ` Anton Bondarenko [this message]
2015-12-05 16:57 ` [PATCH v5 06/11] spi: imx: return error from dma channel request Anton Bondarenko
2015-12-07 9:32 ` Sascha Hauer
2015-12-07 23:38 ` Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 07/11] spi: imx: defer spi initialization, if DMA engine is Anton Bondarenko
[not found] ` <1449334629-4715-8-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-15 22:41 ` Applied "spi: imx: defer spi initialization, if DMA engine is" to the spi tree Mark Brown
2015-12-05 16:57 ` [PATCH v5 08/11] spi: imx: allow only WML aligned transfers to use DMA Anton Bondarenko
[not found] ` <1449334629-4715-9-git-send-email-anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2015-12-07 9:42 ` Sascha Hauer
[not found] ` <20151207094224.GC11966-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2015-12-08 0:33 ` Anton Bondarenko
2015-12-08 6:05 ` Sascha Hauer
2015-12-05 16:57 ` [PATCH v5 09/11] spi: imx: remove dead RX DMA tail handling code Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 10/11] spi: imx: replace fixed timeout with calculated Anton Bondarenko
2015-12-05 16:57 ` [PATCH v5 11/11] spi: imx: add support for all SPI word width for DMA Anton Bondarenko
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