From: Patrice CHOTARD <patrice.chotard@foss.st.com>
To: Conor Dooley <conor@kernel.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Arnd Bergmann <arnd@arndb.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <christophe.kerello@foss.st.com>
Subject: Re: [PATCH v2 1/9] dt-bindings: spi: Add STM32 OSPI controller
Date: Thu, 30 Jan 2025 11:28:16 +0100 [thread overview]
Message-ID: <5892e452-96e7-4945-a2dd-2e713d85d751@foss.st.com> (raw)
In-Reply-To: <20250129-feminize-spotlight-2cee53f8b463@spud>
On 1/29/25 18:53, Conor Dooley wrote:
> On Wed, Jan 29, 2025 at 06:40:23PM +0100, Patrice CHOTARD wrote:
>> On 1/28/25 19:02, Conor Dooley wrote:
>>> On Tue, Jan 28, 2025 at 09:17:23AM +0100, patrice.chotard@foss.st.com wrote:
>>>> + memory-region:
>>>> + maxItems: 1
>>>
>>> Whatever about not having descriptions for clocks or reg when there's
>>> only one, I think a memory region should be explained.
>>
>> ok i will add :
>>
>> description: |
>
> The | isn't needed here.
>
>> Memory region to be used for memory-map read access.
>
> I don't think that's a good explanation, sorry. Why's a memory-region
> required for read access?
>
>>>> +
>>>> + clocks:
>>>> + maxItems: 1
>>>> +
>>>> + interrupts:
>>>> + maxItems: 1
>>>> +
>>>> + resets:
>>>> + items:
>>>> + - description: phandle to OSPI block reset
>>>> + - description: phandle to delay block reset
>>>> +
>>>> + dmas:
>>>> + maxItems: 2
>>>> +
>>>> + dma-names:
>>>> + items:
>>>> + - const: tx
>>>> + - const: rx
>>>> +
>>>> + st,syscfg-dlyb:
>>>> + description: phandle to syscon block
>>>> + Use to set the OSPI delay block within syscon to
>>>> + tune the phase of the RX sampling clock (or DQS) in order
>>>> + to sample the data in their valid window and to
>>>> + tune the phase of the TX launch clock in order to meet setup
>>>> + and hold constraints of TX signals versus the memory clock.
>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array
>>>
>>> Why do you need a phandle here? I assume looking up by compatible ain't
>>> possible because you have multiple controllers on the SoC? Also, I don't
>>
>> Yes, we got 2 OCTOSPI controller, each of them have a dedicated delay block
>> syscfg register.
>
> :+1:
>
>>> think your copy-paste "phandle to" stuff here is accurate:
>>> st,syscfg-dlyb = <&syscfg 0x1000>;
>>> There's an offset here that you don't mention in your description.
>>
>> I will add it as following:
>>
>> st,syscfg-dlyb:
>> description:
>> Use to set the OSPI delay block within syscon to
>> tune the phase of the RX sampling clock (or DQS) in order
>> to sample the data in their valid window and to
>> tune the phase of the TX launch clock in order to meet setup
>> and hold constraints of TX signals versus the memory clock.
>> $ref: /schemas/types.yaml#/definitions/phandle-array
>> items:
>> - description: phandle to syscfg
>> - description: register offset within syscfg
>
> :+1:
>
>>>> + access-controllers:
>>>> + description: phandle to the rifsc device to check access right
>>>> + and in some cases, an additional phandle to the rcc device for
>>>> + secure clock control
>>>
>>> This should be described using items rather than a free-form list.
>>
>> access-controllers:
>> description: phandle to the rifsc device to check access right
>> and in some cases, an additional phandle to the rcc device for
>> secure clock control
>> items:
>> - description: phandle to bus controller or to clock controller
>> - description: access controller specifier
>> minItems: 1
>> maxItems: 2
>
> These updates look fine to me.
I got an issue with access-controllers property.
i can't list the 2 items (the second one is optional) and use minItems and maxItems.
For example:
access-controllers:
description: phandle to the rifsc device to check access right
and in some cases, an additional phandle to the rcc device for
secure clock control.
items:
- description: phandle to bus controller
- description: phandle to clock controller
minItems: 1
maxItems: 2
make dt_binding_check DT_SCHEMA_FILES=st,stm32mp25-ospi.yaml
Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml: properties:access-controllers: {'description': 'phandle to the rifsc device to check access right and in some cases, an additional phandle to the rcc device for secure clock control.', 'items': [{'description': 'phandle to bus controller'}, {'description': 'phandle to clock controller'}], 'minItems': 1, 'maxItems': 2} should not be valid under {'required': ['maxItems']}
hint: "maxItems" is not needed with an "items" list
from schema $id: http://devicetree.org/meta-schemas/items.yaml#
DTC [C] Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.example.dtb
How can i indicate that at least one items is mandatory, the second one is optional and in the same
time describing the both items as required without getting the above error ?
On other yaml files, for examples
/usb/dwc2.yaml
spi/st,stm32-qspi.yaml
spi/st,stm32-spi.yaml
sound/st,stm32-i2s.yaml
st,stm32-spdifrx.yaml
sound/st,stm32-sai.yam
serial/st,stm32-uart.yaml
rng/st,stm32-rng.yaml
regulator/st,stm32-vrefbuf.yaml
mfd/st,stm32-timers.yaml
.....
The only yaml given description is :
access-controllers:
minItems: 1
maxItems: 2
Thanks
Patrice
next prev parent reply other threads:[~2025-01-30 10:35 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-28 8:17 [PATCH v2 0/9] Add STM32MP25 SPI NOR support patrice.chotard
2025-01-28 8:17 ` [PATCH v2 1/9] dt-bindings: spi: Add STM32 OSPI controller patrice.chotard
2025-01-28 18:02 ` Conor Dooley
2025-01-29 7:40 ` Krzysztof Kozlowski
2025-01-29 7:53 ` Krzysztof Kozlowski
2025-01-30 9:48 ` Patrice CHOTARD
2025-01-29 17:40 ` Patrice CHOTARD
2025-01-29 17:53 ` Conor Dooley
2025-01-30 8:51 ` Patrice CHOTARD
2025-01-30 10:28 ` Patrice CHOTARD [this message]
2025-01-30 12:26 ` Krzysztof Kozlowski
2025-01-30 12:39 ` Patrice CHOTARD
2025-01-28 8:17 ` [PATCH v2 2/9] spi: stm32: Add OSPI driver patrice.chotard
2025-01-28 12:37 ` Mark Brown
2025-01-30 8:55 ` Patrice CHOTARD
2025-01-28 8:17 ` [PATCH v2 3/9] dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller patrice.chotard
2025-01-29 7:52 ` Krzysztof Kozlowski
2025-01-30 8:57 ` Patrice CHOTARD
2025-01-30 12:12 ` Krzysztof Kozlowski
2025-01-30 13:32 ` Patrice CHOTARD
2025-01-30 15:09 ` Krzysztof Kozlowski
2025-02-03 10:46 ` Patrice CHOTARD
2025-02-03 11:40 ` Krzysztof Kozlowski
2025-02-04 7:29 ` Patrice CHOTARD
2025-02-04 7:50 ` Krzysztof Kozlowski
2025-02-04 8:16 ` Patrice CHOTARD
2025-01-28 8:17 ` [PATCH v2 4/9] memory: Add STM32 Octo Memory Manager driver patrice.chotard
2025-01-28 9:17 ` Philipp Zabel
2025-02-03 7:29 ` Patrice CHOTARD
2025-01-28 8:17 ` [PATCH v2 5/9] arm64: dts: st: Add OMM node on stm32mp251 patrice.chotard
2025-01-28 8:17 ` [PATCH v2 6/9] arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi patrice.chotard
2025-01-28 8:17 ` [PATCH v2 7/9] arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board patrice.chotard
2025-01-28 8:17 ` [PATCH v2 8/9] arm64: defconfig: Enable STM32 Octo Memory Manager driver patrice.chotard
2025-01-28 8:17 ` [PATCH v2 9/9] arm64: defconfig: Enable STM32 OctoSPI driver patrice.chotard
2025-01-29 9:36 ` Krzysztof Kozlowski
2025-01-29 10:30 ` Krzysztof Kozlowski
2025-01-30 8:56 ` Patrice CHOTARD
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