From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: nick.hawkins@hpe.com
Cc: broonie@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, verdun@hpe.com,
linux@armlinux.org.uk, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, arnd@arndb.de,
joel@jms.id.au
Subject: Re: [PATCH v1 1/5] spi: spi-gxp: Add support for HPE GXP SoCs
Date: Thu, 21 Jul 2022 16:53:08 +0200 [thread overview]
Message-ID: <66e94a45-d5b8-ead2-ef76-89bb680ca00f@linaro.org> (raw)
In-Reply-To: <20220720201158.78068-2-nick.hawkins@hpe.com>
On 20/07/2022 22:11, nick.hawkins@hpe.com wrote:
> From: Nick Hawkins <nick.hawkins@hpe.com>
>
> The GXP supports 3 separate SPI interfaces to accommodate the system
> flash, core flash, and other functions. The SPI engine supports variable
> clock frequency, selectable 3-byte or 4-byte addressing and a
> configurable x1, x2, and x4 command/address/data modes. The memory
> buffer for reading and writing ranges between 256 bytes and 8KB. This
> driver supports access to the core flash and bios part.
>
(...)
> +static int gxp_spifi_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + const struct gxp_spi_data *data;
> + struct spi_controller *ctlr;
> + struct gxp_spi *spifi;
> + struct resource *res;
> + int ret;
> +
> + data = of_device_get_match_data(&pdev->dev);
> + if (!data) {
> + dev_err(&pdev->dev, "of_dev_get_match_data failed\n");
Is it even possible to happen? I don't think so, so definitely not worth
log message.
> + return -ENOMEM;
> + }
> +
> + ctlr = devm_spi_alloc_master(dev, sizeof(*spifi));
> + if (!ctlr) {
> + dev_err(&pdev->dev, "spi_alloc_master failed\n");
Aren't you duplicating core messages?
> + return -ENOMEM;
> + }
> +
> + spifi = spi_controller_get_devdata(ctlr);
> + if (!spifi) {
Is it even possible?
> + dev_err(&pdev->dev, "spi_controller_get_data failed\n");
> + return -ENOMEM;
> + }
> +
> + platform_set_drvdata(pdev, spifi);
> + spifi->data = data;
> + spifi->dev = dev;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + spifi->reg_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(spifi->reg_base))
> + return PTR_ERR(spifi->reg_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + spifi->dat_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(spifi->dat_base))
> + return PTR_ERR(spifi->dat_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
> + spifi->dir_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(spifi->dir_base))
> + return PTR_ERR(spifi->dir_base);
> +
> + ctlr->mode_bits = data->mode_bits;
> + ctlr->bus_num = pdev->id;
> + ctlr->mem_ops = &gxp_spi_mem_ops;
> + ctlr->setup = gxp_spi_setup;
> + ctlr->num_chipselect = data->max_cs;
> + ctlr->dev.of_node = dev->of_node;
> +
> + ret = devm_spi_register_controller(dev, ctlr);
> + if (ret) {
> + dev_err(&pdev->dev, "spi_register_controller failed\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int gxp_spifi_remove(struct platform_device *pdev)
> +{
> + return 0;
> +}
It's empty, why do you need it?
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-21 14:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-20 20:11 [PATCH v1 0/5] Add SPI Driver to HPE GXP Architecture nick.hawkins
2022-07-20 20:11 ` [PATCH v1 1/5] spi: spi-gxp: Add support for HPE GXP SoCs nick.hawkins
2022-07-21 14:53 ` Krzysztof Kozlowski [this message]
2022-07-21 16:04 ` Christophe JAILLET
2022-07-20 20:11 ` [PATCH v1 2/5] spi: dt-bindings: add documentation for hpe,gxp-spifi nick.hawkins
2022-07-21 14:39 ` Rob Herring
2022-07-21 15:03 ` Krzysztof Kozlowski
2022-07-20 20:11 ` [PATCH v1 3/5] ARM: dts: hpe: Add spi driver node nick.hawkins
2022-07-20 20:11 ` [PATCH v1 4/5] ARM: configs: multi_v7_defconfig: Enable HPE GXP SPI driver nick.hawkins
2022-07-21 15:06 ` Krzysztof Kozlowski
2022-07-20 20:11 ` [PATCH v1 5/5] MAINTAINERS: add spi support to GXP nick.hawkins
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