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From: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
To: Kamal Dasu <kamal.dasu-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Cc: Kamal Dasu <kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Cyrille Pitchen
	<cyrille.pitchen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>,
	Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	MTD Maling List
	<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Florian Fainelli
	<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
Subject: Re: [PATCH v4 1/2] mtd: spi-nor: Added spi-nor init function
Date: Sun, 19 Feb 2017 23:51:00 +0100	[thread overview]
Message-ID: <67f20df6-8598-4e64-9ef0-61adb88bad37@denx.de> (raw)
In-Reply-To: <CAKekbetnpY=zRJM0=xn5t2enDcts5tQTV6ZtvPaW_geOd3=DQQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On 02/19/2017 11:38 PM, Kamal Dasu wrote:
> Marek,
> 
> On Sun, Feb 19, 2017 at 5:37 AM, Marek Vasut <marex-ynQEQJNshbs@public.gmane.org> wrote:
>> On 02/19/2017 10:47 AM, Kamal Dasu wrote:
>>> On Sat, Feb 18, 2017 at 5:29 PM, Marek Vasut <marex-ynQEQJNshbs@public.gmane.org> wrote:
>>>> On 02/14/2017 04:32 PM, Kamal Dasu wrote:
>>>>> Refactored spi_nor_scan() code to add spi_nor_init() function that
>>>>> programs the spi-nor flash to:
>>>>> 1) remove flash protection if applicable
>>>>> 2) set read mode to quad mode if configured such
>>>>> 3) set the address width based on the flash size and vendor
>>>>>
>>>>> spi_nor_scan() now calls spi_nor_init() to setup nor flash.
>>>>>
>>>>> Signed-off-by: Kamal Dasu <kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>>
>>>> Changelog missing ?
>>>
>>> Yes will add it and resend.
>>>
>>>>
>>>>> ---
>>>>>  drivers/mtd/spi-nor/spi-nor.c | 72 +++++++++++++++++++++++++++----------------
>>>>>  include/linux/mtd/spi-nor.h   | 18 ++++++++++-
>>>>>  2 files changed, 62 insertions(+), 28 deletions(-)
>>>>>
>>>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>>>>> index 70e52ff..2bf7f4f 100644
>>>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>>>> @@ -1526,6 +1526,44 @@ static int s3an_nor_scan(const struct flash_info *info, struct spi_nor *nor)
>>>>>       return 0;
>>>>>  }
>>>>>
>>>>> +int spi_nor_init(struct spi_nor *nor)
>>>>> +{
>>>>> +     int ret = 0;
>>>>> +     const struct flash_info *info = nor->info;
>>>>> +     struct device *dev = nor->dev;
>>>>> +
>>>>> +     /*
>>>>> +      * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
>>>>> +      * with the software protection bits set
>>>>> +      */
>>>>> +
>>>>> +     if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
>>>>> +         JEDEC_MFR(info) == SNOR_MFR_INTEL ||
>>>>> +         JEDEC_MFR(info) == SNOR_MFR_SST ||
>>>>> +         info->flags & SPI_NOR_HAS_LOCK) {
>>>>> +             write_enable(nor);
>>>>> +             write_sr(nor, 0);
>>>>> +             spi_nor_wait_till_ready(nor);
>>>>> +     }
>>>>> +
>>>>> +     if (nor->flash_read == SPI_NOR_QUAD) {
>>>>> +             ret = set_quad_mode(nor, info);
>>>>> +             if (ret) {
>>>>> +                     dev_err(dev, "quad mode not supported\n");
>>>>> +                     return ret;
>>>>> +             }
>>>>> +     }
>>>
>>> quad mode is being set in the above block of code.
>>>
>>>>> +
>>>>> +     if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
>>>>> +         info->flags & SPI_NOR_4B_OPCODES)
>>>>> +             spi_nor_set_4byte_opcodes(nor, info);
>>>>> +     else
>>>>> +             set_4byte(nor, info, 1);
>>>>> +
>>>>> +     return ret;
>>>>> +}
>>>>> +EXPORT_SYMBOL_GPL(spi_nor_init);
>>>>> +
>>>>>  int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>>>>>  {
>>>>>       const struct flash_info *info = NULL;
>>>>> @@ -1571,6 +1609,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>>>>>               }
>>>>>       }
>>>>>
>>>>> +     nor->info = info;
>>>>>       mutex_init(&nor->lock);
>>>>>
>>>>>       /*
>>>>> @@ -1581,20 +1620,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>>>>>       if (info->flags & SPI_S3AN)
>>>>>               nor->flags |=  SNOR_F_READY_XSR_RDY;
>>>>>
>>>>> -     /*
>>>>> -      * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
>>>>> -      * with the software protection bits set
>>>>> -      */
>>>>> -
>>>>> -     if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
>>>>> -         JEDEC_MFR(info) == SNOR_MFR_INTEL ||
>>>>> -         JEDEC_MFR(info) == SNOR_MFR_SST ||
>>>>> -         info->flags & SPI_NOR_HAS_LOCK) {
>>>>> -             write_enable(nor);
>>>>> -             write_sr(nor, 0);
>>>>> -             spi_nor_wait_till_ready(nor);
>>>>> -     }
>>>>> -
>>>>>       if (!mtd->name)
>>>>>               mtd->name = dev_name(dev);
>>>>>       mtd->priv = nor;
>>>>> @@ -1669,11 +1694,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>>>>>
>>>>>       /* Quad/Dual-read mode takes precedence over fast/normal */
>>>>>       if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) {
>>>>> -             ret = set_quad_mode(nor, info);
>>>>> -             if (ret) {
>>>>> -                     dev_err(dev, "quad mode not supported\n");
>>>>> -                     return ret;
>>>>> -             }
>>>>>               nor->flash_read = SPI_NOR_QUAD;
>>>>
>>>> So from here on, any user will expect quad mode to be correctly set, but
>>>> it really isn't. Is that OK ?
>>>
>>> It is being set in spi_nor_init() based on the  nor->flash_read == SPI_NOR_QUAD;
>>>
>>
>> But that's invoked later, so whoever adds code between this place and
>> the invocation of spi_nor_init() will be misled into believing the SPI
>> NOR is set up in quad-mode, while it would not be, right ?
>>
> 
> I made this change based on  previous comments from Cyrlle. All
> spi-nor based settings that need commands to the flash happens in one
> function now. The code before calling spi_nor_init is setting the
> configuration in the nor structure. I don't see how its very different
> from before. I did separate each setting in functions without changing
> the flow in spi_nor_scan()  before and was to told to change it this
> way to be more optimal. I don't see how anyone will have any
> confusion. So please let me know how exactly you want it.

Hmmmm, I wonder if nor->flash_read = SPI_NOR_QUAD; shouldn't be set in
set_quad_mode() ?

-- 
Best regards,
Marek Vasut
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  parent reply	other threads:[~2017-02-19 22:51 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-14 15:32 [PATCH v4 0/2] Added support for spi-nor device pm in m25p80 Kamal Dasu
     [not found] ` <1487086368-4118-1-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-02-14 15:32   ` [PATCH v4 1/2] mtd: spi-nor: Added spi-nor init function Kamal Dasu
     [not found]     ` <1487086368-4118-2-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-02-18 22:29       ` Marek Vasut
     [not found]         ` <b6079dbb-82fc-7579-32b2-b8c071ef02ef-ynQEQJNshbs@public.gmane.org>
2017-02-19  9:47           ` Kamal Dasu
     [not found]             ` <CAKekbesKKS_s873D=xy2tQcVYei_26gYipn2ru1rVY4ihXbsXw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-19 10:37               ` Marek Vasut
     [not found]                 ` <54393706-cd93-603a-193b-25fbf52b2d83-ynQEQJNshbs@public.gmane.org>
2017-02-19 22:38                   ` Kamal Dasu
     [not found]                     ` <CAKekbetnpY=zRJM0=xn5t2enDcts5tQTV6ZtvPaW_geOd3=DQQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-19 22:51                       ` Marek Vasut [this message]
2017-02-20  8:12     ` Rafał Miłecki
2017-02-20  8:15       ` Marek Vasut
2017-02-14 15:32   ` [PATCH v4 2/2] mtd: m25p80: Added pm ops support Kamal Dasu
     [not found]     ` <1487086368-4118-3-git-send-email-kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-02-18 22:31       ` Marek Vasut
     [not found]         ` <e5fb0bdf-0956-e364-14fb-c255471f371d-ynQEQJNshbs@public.gmane.org>
2017-02-19  9:48           ` Kamal Dasu

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