From: William Qiu <william.qiu@starfivetech.com>
To: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
<devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
"Emil Renner Berthing" <kernel@esmil.dk>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH v2 2/3] dt-bindings: spi: constrain minItems of clocks and clock-names
Date: Tue, 18 Jul 2023 14:06:01 +0800 [thread overview]
Message-ID: <6c53310c-1dc0-6623-369b-1a73fc8f63a5@starfivetech.com> (raw)
In-Reply-To: <9891a7e3-0fce-4d05-8ead-3c0ed155d725@sirena.org.uk>
On 2023/7/14 19:52, Mark Brown wrote:
> On Fri, Jul 14, 2023 at 03:14:59PM +0800, William Qiu wrote:
>> On 2023/7/13 22:57, Rob Herring wrote:
>
>> > I suspect that PCLK and SSPCLK are tied to the same clock source. There
>> > must be an SSPCLK because that is the one used to clock the SPI bus and
>> > we need to know the frequency of it.
>
>> After communicating with colleagues in SoC FE, I learned that PCLK and
>> SSPCLK were homologous on JH7110. He said that SSPCLK would divide the
>> frequency internally anyway, and there was no need for external part frequency,
>> so he directly gave them together.
>
>> So, should I call this clock ssp_apb or keep it SSPCLK?
>
> I'd expect this to be handled in the DTS for the SoC - connect both
> clocks the binding requires to whatever the upstream clock is, it's not
> clear to me that any binding change is required.
You mean binding two clocks, with the same clock source? Then there is no
need to modify YAML.
Best regards,
William
next prev parent reply other threads:[~2023-07-18 6:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 9:00 [PATCH v2 0/3] Add SPI module for StarFive JH7110 SoC William Qiu
2023-07-13 9:00 ` [PATCH v2 1/3] dt-bindings: spi: add reference file to YAML William Qiu
2023-07-13 10:12 ` Krzysztof Kozlowski
2023-07-14 7:18 ` William Qiu
2023-07-13 9:00 ` [PATCH v2 2/3] dt-bindings: spi: constrain minItems of clocks and clock-names William Qiu
2023-07-13 10:13 ` Krzysztof Kozlowski
2023-07-13 12:28 ` Mark Brown
2023-07-13 12:39 ` Krzysztof Kozlowski
2023-07-13 13:48 ` Mark Brown
2023-07-13 14:57 ` Rob Herring
2023-07-14 7:14 ` William Qiu
2023-07-14 11:52 ` Mark Brown
2023-07-18 6:06 ` William Qiu [this message]
2023-07-18 14:07 ` Mark Brown
2023-07-13 9:00 ` [PATCH v2 3/3] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu
2023-07-24 18:28 ` (subset) [PATCH v2 0/3] Add SPI module for StarFive " Mark Brown
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