From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEB8DEB64DC for ; Tue, 18 Jul 2023 06:06:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229901AbjGRGGL (ORCPT ); Tue, 18 Jul 2023 02:06:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229585AbjGRGGK (ORCPT ); Tue, 18 Jul 2023 02:06:10 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50038A6; Mon, 17 Jul 2023 23:06:06 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 0329224E20D; Tue, 18 Jul 2023 14:06:03 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 18 Jul 2023 14:06:03 +0800 Received: from [192.168.120.57] (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 18 Jul 2023 14:06:02 +0800 Message-ID: <6c53310c-1dc0-6623-369b-1a73fc8f63a5@starfivetech.com> Date: Tue, 18 Jul 2023 14:06:01 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v2 2/3] dt-bindings: spi: constrain minItems of clocks and clock-names To: Mark Brown CC: Rob Herring , Krzysztof Kozlowski , , , , , Krzysztof Kozlowski , Conor Dooley , "Emil Renner Berthing" , Linus Walleij References: <20230713090015.127541-1-william.qiu@starfivetech.com> <20230713090015.127541-3-william.qiu@starfivetech.com> <20230713145724.GA3975811-robh@kernel.org> <9891a7e3-0fce-4d05-8ead-3c0ed155d725@sirena.org.uk> Content-Language: en-US From: William Qiu In-Reply-To: <9891a7e3-0fce-4d05-8ead-3c0ed155d725@sirena.org.uk> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On 2023/7/14 19:52, Mark Brown wrote: > On Fri, Jul 14, 2023 at 03:14:59PM +0800, William Qiu wrote: >> On 2023/7/13 22:57, Rob Herring wrote: > >> > I suspect that PCLK and SSPCLK are tied to the same clock source. There >> > must be an SSPCLK because that is the one used to clock the SPI bus and >> > we need to know the frequency of it. > >> After communicating with colleagues in SoC FE, I learned that PCLK and >> SSPCLK were homologous on JH7110. He said that SSPCLK would divide the >> frequency internally anyway, and there was no need for external part frequency, >> so he directly gave them together. > >> So, should I call this clock ssp_apb or keep it SSPCLK? > > I'd expect this to be handled in the DTS for the SoC - connect both > clocks the binding requires to whatever the upstream clock is, it's not > clear to me that any binding change is required. You mean binding two clocks, with the same clock source? Then there is no need to modify YAML. Best regards, William