linux-spi.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] spi: pxa2xx: Add support for Intel Meteor Lake PCH-P
@ 2022-06-29 12:07 Jarkko Nikula
  2022-06-29 15:35 ` Andy Shevchenko
  0 siblings, 1 reply; 3+ messages in thread
From: Jarkko Nikula @ 2022-06-29 12:07 UTC (permalink / raw)
  To: linux-spi
  Cc: Mark Brown, Daniel Mack, Haojian Zhuang, Robert Jarzmik, Ap Kamal,
	Jarkko Nikula

Add support for LPSS SPI on Intel Meteor Lake PCH-P. It has three
controllers each having two chip selects.

This squashes a fix from Ap, Kamal <kamal.ap@intel.com> fixing incorrect
PCI ID of 3rd controller.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
---
 drivers/spi/spi-pxa2xx.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index edb42d08857d..838d12e65144 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1404,6 +1404,10 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
 	{ PCI_VDEVICE(INTEL, 0x7aab), LPSS_CNL_SSP },
 	{ PCI_VDEVICE(INTEL, 0x7af9), LPSS_CNL_SSP },
 	{ PCI_VDEVICE(INTEL, 0x7afb), LPSS_CNL_SSP },
+	/* MTL-P */
+	{ PCI_VDEVICE(INTEL, 0x7e27), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0x7e30), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0x7e46), LPSS_CNL_SSP },
 	/* CNL-LP */
 	{ PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP },
 	{ PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP },
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] spi: pxa2xx: Add support for Intel Meteor Lake PCH-P
  2022-06-29 12:07 [PATCH] spi: pxa2xx: Add support for Intel Meteor Lake PCH-P Jarkko Nikula
@ 2022-06-29 15:35 ` Andy Shevchenko
  2022-06-30  7:03   ` Jarkko Nikula
  0 siblings, 1 reply; 3+ messages in thread
From: Andy Shevchenko @ 2022-06-29 15:35 UTC (permalink / raw)
  To: Jarkko Nikula
  Cc: linux-spi, Mark Brown, Daniel Mack, Haojian Zhuang,
	Robert Jarzmik, Ap Kamal

On Wed, Jun 29, 2022 at 2:09 PM Jarkko Nikula
<jarkko.nikula@linux.intel.com> wrote:
>
> Add support for LPSS SPI on Intel Meteor Lake PCH-P. It has three
> controllers each having two chip selects.
>
> This squashes a fix from Ap, Kamal <kamal.ap@intel.com> fixing incorrect
> PCI ID of 3rd controller.

With PCH removed from the commit message (including subject)
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> ---
>  drivers/spi/spi-pxa2xx.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
> index edb42d08857d..838d12e65144 100644
> --- a/drivers/spi/spi-pxa2xx.c
> +++ b/drivers/spi/spi-pxa2xx.c
> @@ -1404,6 +1404,10 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
>         { PCI_VDEVICE(INTEL, 0x7aab), LPSS_CNL_SSP },
>         { PCI_VDEVICE(INTEL, 0x7af9), LPSS_CNL_SSP },
>         { PCI_VDEVICE(INTEL, 0x7afb), LPSS_CNL_SSP },
> +       /* MTL-P */
> +       { PCI_VDEVICE(INTEL, 0x7e27), LPSS_CNL_SSP },
> +       { PCI_VDEVICE(INTEL, 0x7e30), LPSS_CNL_SSP },
> +       { PCI_VDEVICE(INTEL, 0x7e46), LPSS_CNL_SSP },
>         /* CNL-LP */
>         { PCI_VDEVICE(INTEL, 0x9daa), LPSS_CNL_SSP },
>         { PCI_VDEVICE(INTEL, 0x9dab), LPSS_CNL_SSP },
> --
> 2.35.1
>


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] spi: pxa2xx: Add support for Intel Meteor Lake PCH-P
  2022-06-29 15:35 ` Andy Shevchenko
@ 2022-06-30  7:03   ` Jarkko Nikula
  0 siblings, 0 replies; 3+ messages in thread
From: Jarkko Nikula @ 2022-06-30  7:03 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: linux-spi, Mark Brown, Daniel Mack, Haojian Zhuang,
	Robert Jarzmik, Ap Kamal

On 6/29/22 18:35, Andy Shevchenko wrote:
> On Wed, Jun 29, 2022 at 2:09 PM Jarkko Nikula
> <jarkko.nikula@linux.intel.com> wrote:
>>
>> Add support for LPSS SPI on Intel Meteor Lake PCH-P. It has three
>> controllers each having two chip selects.
>>
>> This squashes a fix from Ap, Kamal <kamal.ap@intel.com> fixing incorrect
>> PCI ID of 3rd controller.
> 
> With PCH removed from the commit message (including subject)
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> 
Hmm, right. Thanks Andy, Meteor Lake -P seems to integrate PCH die 
functionality into a SoC.

Jarkko

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-06-30  7:03 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-06-29 12:07 [PATCH] spi: pxa2xx: Add support for Intel Meteor Lake PCH-P Jarkko Nikula
2022-06-29 15:35 ` Andy Shevchenko
2022-06-30  7:03   ` Jarkko Nikula

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).