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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Md Sadre Alam <quic_mdalam@quicinc.com>
Cc: Gabor Juhos <j4g8y7@gmail.com>,  Mark Brown <broonie@kernel.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	 Richard Weinberger <richard@nod.at>,
	 Vignesh Raghavendra <vigneshr@ti.com>,
	Varadarajan Narayanan <quic_varada@quicinc.com>,
	 Sricharan Ramabadhran <quic_srichara@quicinc.com>,
	 <linux-spi@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
	 <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH next 2/2] spi: spi-qpic-snand: add support for 8 bits ECC strength
Date: Fri, 16 May 2025 16:14:00 +0200	[thread overview]
Message-ID: <87frh4ej87.fsf@bootlin.com> (raw)
In-Reply-To: <007881c9-e03c-1473-d8eb-53fbad8c6a8e@quicinc.com> (Md Sadre Alam's message of "Tue, 13 May 2025 21:05:09 +0530")


>>> Interestingly enough, it reports the correct number of bit errors now.
>>> For me it seems, that the hardware reports the number of the corrected
>>> *bytes* instead of the corrected *bits*.
>> I doubt that, nobody counts bytes of errors.
>> You results are surprising. I initially though in favour of a software
>> bug, but then it looks even weirder than that. Alam?
> I have checked with HW team , the QPIC ECC HW engine reports the bit
> error byte wise not bit wise.
>
> e.g
>     Byte0 --> 2-bitflips --> QPIC ECC counts 1 only
>     Byte1 --> 3-bitflips --> QPIC ECC counts 1 only
>     Byte2 --> 1-bitflips --> QPIC ECC counts 1 only
>     Byte3 --> 4-bitflips --> QPIC ECC counts 1 only (in 8-bit ecc)
>     Byte4 --> 6-bitflips --> QPIC ECC counts 1 only (in 8-bit ecc)
>
> Hope this can clearify the things now.

o_O ????

How is that even useful? This basically means UBI will never refresh the
data because we will constantly underestimate the number of bitflips! We
need to know the actual number, this averaging does not make any sense
for Linux. Is there another way to get the raw number of bitflips?

Thanks,
Miquèl

  reply	other threads:[~2025-05-16 14:14 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-02 19:31 [PATCH next 0/2] spi: spi-qpic-snand: enable 8 bits ECC strength support Gabor Juhos
2025-05-02 19:31 ` [PATCH next 1/2] mtd: nand: qpic-common: add defines for ECC_MODE values Gabor Juhos
2025-05-05 11:08   ` Md Sadre Alam
2025-05-02 19:31 ` [PATCH next 2/2] spi: spi-qpic-snand: add support for 8 bits ECC strength Gabor Juhos
2025-05-05 11:17   ` Md Sadre Alam
2025-05-05 13:21     ` Gabor Juhos
2025-05-12  8:32       ` Miquel Raynal
2025-05-12 20:19         ` Gabor Juhos
2025-05-13  7:32           ` Miquel Raynal
2025-05-13  9:01             ` Md Sadre Alam
2025-05-13 15:35             ` Md Sadre Alam
2025-05-16 14:14               ` Miquel Raynal [this message]
2025-05-21  5:38                 ` Md Sadre Alam
2025-05-21  7:52                   ` Miquel Raynal
2025-05-22 17:49                     ` Gabor Juhos

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