From mboxrd@z Thu Jan 1 00:00:00 1970 From: Robert Jarzmik Subject: Re: [PATCH 4/7] spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select Date: Sun, 25 Oct 2015 12:49:36 +0100 Message-ID: <87k2qbkw1b.fsf@belgarion.home> References: <1445521485-2029-1-git-send-email-jarkko.nikula@linux.intel.com> <1445521485-2029-4-git-send-email-jarkko.nikula@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Mark Brown , Daniel Mack , Haojian Zhuang To: Jarkko Nikula Return-path: In-Reply-To: <1445521485-2029-4-git-send-email-jarkko.nikula-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> (Jarkko Nikula's message of "Thu, 22 Oct 2015 16:44:42 +0300") Sender: linux-spi-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-ID: Jarkko Nikula writes: > Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for > configuring the chip select polarities. Touch only chip select SW mode and > state bits when enabling the software chip select control in order to not > clear any other bits in the register. > > Signed-off-by: Jarkko Nikula Acked-by: Robert Jarzmik Cheers. -- Robert -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html