Re: [PATCH 3/6] spi: add multi_bus_mode field to struct spi_transfer

["Nuno Sá" <noname.nuno@gmail.com>]

On Wed, 2025-10-15 at 11:15 -0500, David Lechner wrote:
> On 10/15/25 10:18 AM, Mark Brown wrote:
> > On Wed, Oct 15, 2025 at 03:43:09PM +0100, Nuno Sá wrote:
> > > On Wed, 2025-10-15 at 13:01 +0100, Mark Brown wrote:
> > > > On Wed, Oct 15, 2025 at 11:16:01AM +0100, Nuno Sá wrote:
> > > > > On Tue, 2025-10-14 at 17:02 -0500, David Lechner wrote:
> > 
> > > > > >         controller    < data bits <     peripheral
> > > > > >         ----------   ----------------   ----------
> > > > > >             SDI 0    0-0-0-1-0-0-0-1    SDO 0
> > > > > >             SDI 1    1-0-0-0-1-0-0-0    SDO 1
> > 
> > > > > Out of curiosity, how does this work for devices like AD4030 where the same
> > > > > word
> 
> The AD4030 is just one channel, so doesn't do interleaving. But you probably
> meant AD4630 when it is wired up with only 1 SDO line. That line has to be shared
> by both of the simultaneous converters so it alternates between sending one bit
> from each word. This patch series doesn't address that case. But this series will
> work for the AD4630 when it has 2 SDO lines wired up.
> 

Hmm I didn't even remembered that one. But what I meant with interleaved was having
the same data word spread through multiple SDO lines (one bit per line) which is what
(also) happens with the devices I mentioned. And since you mentioned "...two
different data words at the same time, one on each bus...", I raised the question.

So I guess I kind of misused what interleaved typically means (even though I guess
it's not completely off :)) and was thinking more on the parallel concept Mark spoke
about.

Anyways, from your reply I see the intent is to also use the stripe mode for this and
have some kind of external IP deal with data re-order. I gave a look into the ad4630
IP core and indeed there's a data reorder IP block after the offload engine.

- Nuno Sá

> > > >