From: James Clark <james.clark@linaro.org>
To: Frank Li <Frank.li@nxp.com>
Cc: Larisa Grigore <larisa.grigore@nxp.com>,
Mark Brown <broonie@kernel.org>,
Clark Wang <xiaoning.wang@nxp.com>,
Fugang Duan <B38611@freescale.com>, Gao Pan <pandy.gao@nxp.com>,
Fugang Duan <fugang.duan@nxp.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Larisa Grigore <larisa.grigore@oss.nxp.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
Ciprianmarian Costea <ciprianmarian.costea@nxp.com>,
s32@nxp.com, linux-spi@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 12/13] dt-bindings: lpspi: Document nxp,lpspi-pincfg property
Date: Tue, 19 Aug 2025 10:51:03 +0100 [thread overview]
Message-ID: <91b3e06d-501a-48db-b626-5f056287a451@linaro.org> (raw)
In-Reply-To: <aKNJFJDf1Clnkbex@lizhi-Precision-Tower-5810>
On 18/08/2025 4:39 pm, Frank Li wrote:
> On Mon, Aug 18, 2025 at 03:47:45PM +0100, James Clark wrote:
>>
>>
>> On 14/08/2025 7:19 pm, Frank Li wrote:
>>> On Thu, Aug 14, 2025 at 05:06:52PM +0100, James Clark wrote:
>>>> Document the two valid pincfg values and the defaults.
>>>>
>>>> Although the hardware supports two more values for half-duplex modes,
>>>> the driver doesn't support them so don't document them.
>>>
>>> binding doc should be first patch before drivers.
>>>
>>> binding descript hardware not driver, you should add all regardless if
>>> driver support it.
>>>
>>
>> Replied to same on "[PATCH 10/13] spi: spi-fsl-lpspi: Add compatible for
>> S32G"
>>
>>>>
>>>> Signed-off-by: James Clark <james.clark@linaro.org>
>>>> ---
>>>> Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml | 14 ++++++++++++++
>>>> 1 file changed, 14 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
>>>> index ce7bd44ee17e..3f8833911807 100644
>>>> --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
>>>> +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml
>>>> @@ -70,6 +70,19 @@ properties:
>>>> power-domains:
>>>> maxItems: 1
>>>>
>>>> + nxp,pincfg:
>>>> + description:
>>>> + 'Pin configuration value for CFGR1.PINCFG.
>>>> + - "sin-in-sout-out": SIN is used for input data and SOUT is used for
>>>> + output data
>>>> + - "sout-in-sin-out": SOUT is used for input data and SIN is used for
>>>> + output data
>>>> + If no value is specified then the default is "sin-in-sout-out" for host
>>>> + mode and "sout-in-sin-out" for target mode.'
>>>
>>> why need this? are there varible at difference boards? look like default
>>> is more make sense.
>>>
>>
>> + Larissa. I think this might also be a question for the hardware designers
>> about why the feature to swap the pins was deemed worth including.
>>
>> I'm assuming the flexibility is given for routing reasons. If you have
>> another device with the pins in one order then you can route it without a
>> via if they happen to be in the same order.
>
> DT team need reason to judge if a new property is reasonable/neccesary. You
> need mention the reason why need this property. Here, some board design
> swap sin/sout.
>
>>
>>> SPI signal name is MOSI and MISO
>>>
>>> Frank
>>>
>>
>> As mentioned in the commit message of "[PATCH 05/13] spi: spi-fsl-lpspi:
>> Enumerate all pin configuration definitions" the names were taken directly
>> from the reference manual and this doc text was too. I think diverging from
>> CFGR1_PINCFG could be potentially quite confusing. And MOSI isn't mentioned
>> once in S32G3RM rev 4:
>>
>> Configures which pins are used for input and output data during serial
>> transfers. When performing parallel transfers, the Pin Configuration
>> field is ignored.
>>
>> 00b - SIN is used for input data and SOUT is used for output data
>> 01b - SIN is used for both input and output data, only half-duplex
>> serial transfers are supported
>> 10b - SOUT is used for both input and output data, only half-duplex
>> serial transfers are supported
>> 11b - SOUT is used for input data and SIN is used for output data
>
> dt binding is ABI, design user easy understand property string. like
>
> enum:
> - normal
> - swap
> - half-duplex-on-sin
> - half-duplex-on-sout
>
> Frank
>
If we're not directly using the names that get programmed into the
register then it's better to remove the implicit 5th mode that you get
for leaving it blank and to use that as "normal" instead. Then "swap" is
to swap whatever "normal" would have picked. Otherwise "normal" being a
fixed value doesn't match up to the current "normal" behavior which is
actually different value depending on host or target mode.
So it would look like this with the "if no value is specified..." bit
reworded too:
description:
'Pin configuration value for CFGR1.PINCFG.
- "normal": Hosts - SIN is used for input data and SOUT is used
for output data.
Targets - SOUT is used for input data and SIN is
used for output data.
- "swap": The inverse of "normal"
- "half-duplex-on-sin": SIN is used for both input and output
data. Unsupported.
- "half-duplex-on-sout": SOUT is used for both input and output
data. Unsupported.
If no value is specified then the default is "normal".
>>
>> James
>>
>>>> + enum:
>>>> + - sin-in-sout-out
>>>> + - sout-in-sin-out
>>>> +
>>>> required:
>>>> - compatible
>>>> - reg
>>>> @@ -95,4 +108,5 @@ examples:
>>>> spi-slave;
>>>> fsl,spi-only-use-cs1-sel;
>>>> num-cs = <2>;
>>>> + nxp,pincfg = "sout-in-sin-out";
>>>> };
>>>>
>>>> --
>>>> 2.34.1
>>>>
>>
next prev parent reply other threads:[~2025-08-19 9:51 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-14 16:06 [PATCH 00/13] spi: spi-fsl-lpspi: Generic fixes and support for S32G devices James Clark
2025-08-14 16:06 ` [PATCH 01/13] spi: spi-fsl-lpspi: Fix transmissions when using CONT James Clark
2025-08-14 16:06 ` [PATCH 02/13] spi: spi-fsl-lpspi: Set correct chip-select polarity bit James Clark
2025-08-14 16:49 ` Frank Li
2025-08-18 13:05 ` James Clark
2025-08-18 15:19 ` Frank Li
2025-08-19 8:21 ` James Clark
2025-08-19 14:11 ` Frank Li
2025-08-15 3:37 ` kernel test robot
2025-08-14 16:06 ` [PATCH 03/13] spi: spi-fsl-lpspi: Reset FIFO and disable module on transfer abort James Clark
2025-08-14 16:51 ` Frank Li
2025-08-18 13:17 ` James Clark
2025-08-14 16:06 ` [PATCH 04/13] spi: spi-fsl-lpspi: Clear status register after disabling the module James Clark
2025-08-14 16:58 ` Frank Li
2025-08-18 13:21 ` James Clark
2025-08-14 16:06 ` [PATCH 05/13] spi: spi-fsl-lpspi: Enumerate all pin configuration definitions James Clark
2025-08-14 18:10 ` Frank Li
2025-08-18 13:48 ` James Clark
2025-08-14 16:06 ` [PATCH 06/13] spi: spi-fsl-lpspi: Add DT property to override default pin config James Clark
2025-08-14 16:06 ` [PATCH 07/13] spi: spi-fsl-lpspi: Constify devtype datas James Clark
2025-08-14 18:38 ` Frank Li
2025-08-18 13:50 ` James Clark
2025-08-14 16:06 ` [PATCH 08/13] spi: spi-fsl-lpspi: Make prescale erratum a bool James Clark
2025-08-14 18:36 ` Frank Li
2025-08-18 13:54 ` James Clark
2025-08-14 16:06 ` [PATCH 09/13] spi: spi-fsl-lpspi: Parameterize reading num-cs from hardware James Clark
2025-08-14 18:31 ` Frank Li
2025-08-18 14:22 ` James Clark
2025-08-14 16:06 ` [PATCH 10/13] spi: spi-fsl-lpspi: Add compatible for S32G James Clark
2025-08-14 18:25 ` Frank Li
2025-08-18 14:31 ` James Clark
2025-08-18 15:18 ` Mark Brown
2025-08-19 8:23 ` James Clark
2025-08-18 15:28 ` Frank Li
2025-08-14 16:06 ` [PATCH 11/13] dt-bindings: lpspi: Update maximum num-cs value James Clark
2025-08-14 18:28 ` Frank Li
2025-08-18 13:31 ` James Clark
2025-08-14 20:59 ` Rob Herring
2025-08-18 12:49 ` James Clark
2025-08-14 16:06 ` [PATCH 12/13] dt-bindings: lpspi: Document nxp,lpspi-pincfg property James Clark
2025-08-14 18:19 ` Frank Li
2025-08-18 14:47 ` James Clark
2025-08-18 15:39 ` Frank Li
2025-08-19 9:51 ` James Clark [this message]
2025-08-19 14:08 ` Frank Li
2025-08-19 9:52 ` James Clark
2025-08-14 16:06 ` [PATCH 13/13] dt-bindings: lpspi: Document support for S32G James Clark
2025-08-14 18:23 ` Frank Li
2025-08-18 15:00 ` James Clark
2025-08-14 16:40 ` [PATCH 00/13] spi: spi-fsl-lpspi: Generic fixes and support for S32G devices Frank Li
2025-08-14 18:35 ` Mark Brown
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