[PATCH v3 0/3] Add DMA support for RZ/T2H RSPI

[PATCH v3 0/3] Add DMA support for RZ/T2H RSPI

[Cosmin Tanislav]

The DMA controller can be used to transfer data to and from the SPI
controller without involving the CPU for each word of a SPI transfer.

Add support for DMA mode, and do some other cleanups while touching the
same code.

The dts changes in this series depend on the DMA series [1].

[1]: https://lore.kernel.org/lkml/20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com/#t

V3:
 * impose proper maxItems for each device
 * impose maxItems for dmas property

V2:
 * drop patches picked up by Mark
 * add new dt-bindings patch to allow multiple DMAs
 * wire up all DMA controllers for every SPI controller

Cosmin Tanislav (3):
  dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs
  arm64: dts: renesas: r9a09g077: wire up DMA support for SPI
  arm64: dts: renesas: r9a09g087: wire up DMA support for SPI

 .../bindings/spi/renesas,rzv2h-rspi.yaml         | 16 +++++++++++++---
 arch/arm64/boot/dts/renesas/r9a09g077.dtsi       | 16 ++++++++++++++++
 arch/arm64/boot/dts/renesas/r9a09g087.dtsi       | 16 ++++++++++++++++
 3 files changed, 45 insertions(+), 3 deletions(-)

-- 
2.52.0

[PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Cosmin Tanislav]

All supported SoCs have multiple DMA controllers that can be used with
the RSPI peripheral. The current bindings only allow a single pair of RX
and TX DMAs.

The DMA core allows specifying multiple DMAs with the same name, and it
will pick the first available one.

There is an exception in the base dt-schema rules specifically for
allowing this behavior (dtschema/schemas/dma/dma.yaml).

dma-names:
  anyOf:
    - uniqueItems: true
    - items:
        # Hack around Renesas bindings which repeat entries to support
        # multiple possible DMA providers
        enum: [rx, tx]

Allow multiple DMAs to have the same name and only restrict the possible
names of the DMA channels, not their count.

For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
they have 3 DMA controllers.

For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
they have 5 DMA controllers.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
---

V3:
 * impose proper maxItems for each device
 * impose maxItems for dmas property

V2:
 * new patch

 .../bindings/spi/renesas,rzv2h-rspi.yaml         | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
index a588b112e11e..cf8b733b766d 100644
--- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
+++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
@@ -58,12 +58,16 @@ properties:
       - const: tresetn
 
   dmas:
-    maxItems: 2
+    minItems: 2
+    maxItems: 10
 
   dma-names:
+    minItems: 2
+    maxItems: 10
     items:
-      - const: rx
-      - const: tx
+      enum:
+        - rx
+        - tx
 
   power-domains:
     maxItems: 1
@@ -121,6 +125,12 @@ allOf:
         resets: false
         reset-names: false
 
+        dmas:
+          maxItems: 6
+
+        dma-names:
+          maxItems: 6
+
 unevaluatedProperties: false
 
 examples:
-- 
2.52.0

[PATCH v3 2/3] arm64: dts: renesas: r9a09g077: wire up DMA support for SPI

[Cosmin Tanislav]

RZ/T2H (R9A09G077) has three DMA controllers that can be used by
peripherals like SPI to offload data transfers from the CPU.

Wire up the DMA channels for the SPI peripherals.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

V3:
 * no changes

V2:
 * wire up all DMA controllers

 arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
index 14d7fb6f8952..0e44b01a56c7 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi
@@ -200,6 +200,10 @@ rspi0: spi@80007000 {
 			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
 				 <&cpg CPG_MOD 104>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x267a>, <&dmac0 0x267b>,
+			       <&dmac1 0x267a>, <&dmac1 0x267b>,
+			       <&dmac2 0x267a>, <&dmac2 0x267b>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -218,6 +222,10 @@ rspi1: spi@80007400 {
 			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
 				 <&cpg CPG_MOD 105>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x267f>, <&dmac0 0x2680>,
+			       <&dmac1 0x267f>, <&dmac1 0x2680>,
+			       <&dmac2 0x267f>, <&dmac2 0x2680>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -236,6 +244,10 @@ rspi2: spi@80007800 {
 			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
 				 <&cpg CPG_MOD 106>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x2684>, <&dmac0 0x2685>,
+			       <&dmac1 0x2684>, <&dmac1 0x2685>,
+			       <&dmac2 0x2684>, <&dmac2 0x2685>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -254,6 +266,10 @@ rspi3: spi@81007000 {
 			clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
 				 <&cpg CPG_MOD 602>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x2689>, <&dmac0 0x268a>,
+			       <&dmac1 0x2689>, <&dmac1 0x268a>,
+			       <&dmac2 0x2689>, <&dmac2 0x268a>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.52.0

[PATCH v3 3/3] arm64: dts: renesas: r9a09g087: wire up DMA support for SPI

[Cosmin Tanislav]

RZ/N2H (R9A09G087) has three DMA controllers that can be used by
peripherals like SPI to offload data transfers from the CPU.

Wire up the DMA channels for the SPI peripherals.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

V3:
 * no changes

V2:
 * wire up all DMA controllers

 arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
index 4a1339561332..7d1c669ad262 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi
@@ -200,6 +200,10 @@ rspi0: spi@80007000 {
 			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>,
 				 <&cpg CPG_MOD 104>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x267a>, <&dmac0 0x267b>,
+			       <&dmac1 0x267a>, <&dmac1 0x267b>,
+			       <&dmac2 0x267a>, <&dmac2 0x267b>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -218,6 +222,10 @@ rspi1: spi@80007400 {
 			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>,
 				 <&cpg CPG_MOD 105>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x267f>, <&dmac0 0x2680>,
+			       <&dmac1 0x267f>, <&dmac1 0x2680>,
+			       <&dmac2 0x267f>, <&dmac2 0x2680>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -236,6 +244,10 @@ rspi2: spi@80007800 {
 			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>,
 				 <&cpg CPG_MOD 106>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x2684>, <&dmac0 0x2685>,
+			       <&dmac1 0x2684>, <&dmac1 0x2685>,
+			       <&dmac2 0x2684>, <&dmac2 0x2685>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -254,6 +266,10 @@ rspi3: spi@81007000 {
 			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>,
 				 <&cpg CPG_MOD 602>;
 			clock-names = "pclk", "pclkspi";
+			dmas = <&dmac0 0x2689>, <&dmac0 0x268a>,
+			       <&dmac1 0x2689>, <&dmac1 0x268a>,
+			       <&dmac2 0x2689>, <&dmac2 0x268a>;
+			dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
 			power-domains = <&cpg>;
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.52.0

Re: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2537 bytes --]

On Wed, Jan 28, 2026 at 11:51:30PM +0200, Cosmin Tanislav wrote:
> All supported SoCs have multiple DMA controllers that can be used with
> the RSPI peripheral. The current bindings only allow a single pair of RX
> and TX DMAs.
> 
> The DMA core allows specifying multiple DMAs with the same name, and it
> will pick the first available one.
> 
> There is an exception in the base dt-schema rules specifically for
> allowing this behavior (dtschema/schemas/dma/dma.yaml).
> 
> dma-names:
>   anyOf:
>     - uniqueItems: true
>     - items:
>         # Hack around Renesas bindings which repeat entries to support
>         # multiple possible DMA providers
>         enum: [rx, tx]
> 
> Allow multiple DMAs to have the same name and only restrict the possible
> names of the DMA channels, not their count.
> 
> For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
> they have 3 DMA controllers.

What's the rationale behind not setting minItems to 6 here

> 
> For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
> they have 5 DMA controllers.

and to 10 here? Do any of the spi controllers on these SoCs not have the
ability to use all of the available dma controllers?

> 
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> ---
> 
> V3:
>  * impose proper maxItems for each device
>  * impose maxItems for dmas property
> 
> V2:
>  * new patch
> 
>  .../bindings/spi/renesas,rzv2h-rspi.yaml         | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> index a588b112e11e..cf8b733b766d 100644
> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> @@ -58,12 +58,16 @@ properties:
>        - const: tresetn
>  
>    dmas:
> -    maxItems: 2
> +    minItems: 2
> +    maxItems: 10
>  
>    dma-names:
> +    minItems: 2
> +    maxItems: 10
>      items:
> -      - const: rx
> -      - const: tx
> +      enum:
> +        - rx
> +        - tx
>  
>    power-domains:
>      maxItems: 1
> @@ -121,6 +125,12 @@ allOf:
>          resets: false
>          reset-names: false
>  
> +        dmas:
> +          maxItems: 6
> +
> +        dma-names:
> +          maxItems: 6
> +
>  unevaluatedProperties: false
>  
>  examples:
> -- 
> 2.52.0

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

RE: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Cosmin-Gabriel Tanislav]

> From: Conor Dooley <conor@kernel.org>
> Sent: Thursday, January 29, 2026 7:45 PM
> 
> On Wed, Jan 28, 2026 at 11:51:30PM +0200, Cosmin Tanislav wrote:
> > All supported SoCs have multiple DMA controllers that can be used with
> > the RSPI peripheral. The current bindings only allow a single pair of RX
> > and TX DMAs.
> >
> > The DMA core allows specifying multiple DMAs with the same name, and it
> > will pick the first available one.
> >
> > There is an exception in the base dt-schema rules specifically for
> > allowing this behavior (dtschema/schemas/dma/dma.yaml).
> >
> > dma-names:
> >   anyOf:
> >     - uniqueItems: true
> >     - items:
> >         # Hack around Renesas bindings which repeat entries to support
> >         # multiple possible DMA providers
> >         enum: [rx, tx]
> >
> > Allow multiple DMAs to have the same name and only restrict the possible
> > names of the DMA channels, not their count.
> >
> > For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
> > they have 3 DMA controllers.
> 
> What's the rationale behind not setting minItems to 6 here
> 
> >
> > For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
> > they have 5 DMA controllers.
> 
> and to 10 here? Do any of the spi controllers on these SoCs not have the
> ability to use all of the available dma controllers?
> 

I left minItems to 2 in case it is necessary to wire up SPI to only a
subset of the DMA controllers, maybe for performance reasons in a
board-specific dts?

I know that dts is only supposed to describe the hardware itself, but for
now this would be the only way to pre-select which DMA controller is used
for a specific IP.

Let me know your thoughts.

> >
> > Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> > ---
> >
> > V3:
> >  * impose proper maxItems for each device
> >  * impose maxItems for dmas property
> >
> > V2:
> >  * new patch
> >
> >  .../bindings/spi/renesas,rzv2h-rspi.yaml         | 16 +++++++++++++---
> >  1 file changed, 13 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > index a588b112e11e..cf8b733b766d 100644
> > --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > @@ -58,12 +58,16 @@ properties:
> >        - const: tresetn
> >
> >    dmas:
> > -    maxItems: 2
> > +    minItems: 2
> > +    maxItems: 10
> >
> >    dma-names:
> > +    minItems: 2
> > +    maxItems: 10
> >      items:
> > -      - const: rx
> > -      - const: tx
> > +      enum:
> > +        - rx
> > +        - tx
> >
> >    power-domains:
> >      maxItems: 1
> > @@ -121,6 +125,12 @@ allOf:
> >          resets: false
> >          reset-names: false
> >
> > +        dmas:
> > +          maxItems: 6
> > +
> > +        dma-names:
> > +          maxItems: 6
> > +
> >  unevaluatedProperties: false
> >
> >  examples:
> > --
> > 2.52.0

Re: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2035 bytes --]

On Thu, Jan 29, 2026 at 05:55:21PM +0000, Cosmin-Gabriel Tanislav wrote:
> > From: Conor Dooley <conor@kernel.org>
> > Sent: Thursday, January 29, 2026 7:45 PM
> > 
> > On Wed, Jan 28, 2026 at 11:51:30PM +0200, Cosmin Tanislav wrote:
> > > All supported SoCs have multiple DMA controllers that can be used with
> > > the RSPI peripheral. The current bindings only allow a single pair of RX
> > > and TX DMAs.
> > >
> > > The DMA core allows specifying multiple DMAs with the same name, and it
> > > will pick the first available one.
> > >
> > > There is an exception in the base dt-schema rules specifically for
> > > allowing this behavior (dtschema/schemas/dma/dma.yaml).
> > >
> > > dma-names:
> > >   anyOf:
> > >     - uniqueItems: true
> > >     - items:
> > >         # Hack around Renesas bindings which repeat entries to support
> > >         # multiple possible DMA providers
> > >         enum: [rx, tx]
> > >
> > > Allow multiple DMAs to have the same name and only restrict the possible
> > > names of the DMA channels, not their count.
> > >
> > > For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
> > > they have 3 DMA controllers.
> > 
> > What's the rationale behind not setting minItems to 6 here
> > 
> > >
> > > For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
> > > they have 5 DMA controllers.
> > 
> > and to 10 here? Do any of the spi controllers on these SoCs not have the
> > ability to use all of the available dma controllers?
> > 
> 
> I left minItems to 2 in case it is necessary to wire up SPI to only a
> subset of the DMA controllers, maybe for performance reasons in a
> board-specific dts?
> 
> I know that dts is only supposed to describe the hardware itself, but for
> now this would be the only way to pre-select which DMA controller is used
> for a specific IP.
> 
> Let me know your thoughts.

Yeah, I can buy that argument.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Krzysztof Kozlowski]

On 28/01/2026 22:51, Cosmin Tanislav wrote:
> All supported SoCs have multiple DMA controllers that can be used with
> the RSPI peripheral. The current bindings only allow a single pair of RX
> and TX DMAs.
> 
> The DMA core allows specifying multiple DMAs with the same name, and it
> will pick the first available one.
> 
> There is an exception in the base dt-schema rules specifically for
> allowing this behavior (dtschema/schemas/dma/dma.yaml).
> 
> dma-names:
>   anyOf:
>     - uniqueItems: true
>     - items:
>         # Hack around Renesas bindings which repeat entries to support
>         # multiple possible DMA providers
>         enum: [rx, tx]
> 
> Allow multiple DMAs to have the same name and only restrict the possible
> names of the DMA channels, not their count.
> 
> For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
> they have 3 DMA controllers.
> 
> For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
> they have 5 DMA controllers.
> 
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> ---
> 
> V3:
>  * impose proper maxItems for each device
>  * impose maxItems for dmas property
> 
> V2:
>  * new patch
> 
>  .../bindings/spi/renesas,rzv2h-rspi.yaml         | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> index a588b112e11e..cf8b733b766d 100644
> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> @@ -58,12 +58,16 @@ properties:
>        - const: tresetn
>  
>    dmas:
> -    maxItems: 2
> +    minItems: 2
> +    maxItems: 10

As pointed out by Renesas, this is not correct or finished.

I don't understand why Renesas people don't review THEIR own code
instead, but send a patch correcting other un-merged patch.

Really, start working on each other submissions.

NAK

Best regards,
Krzysztof

Re: (subset) [PATCH v3 0/3] Add DMA support for RZ/T2H RSPI

[Mark Brown]

On Wed, 28 Jan 2026 23:51:29 +0200, Cosmin Tanislav wrote:
> The DMA controller can be used to transfer data to and from the SPI
> controller without involving the CPU for each word of a SPI transfer.
> 
> Add support for DMA mode, and do some other cleanups while touching the
> same code.
> 
> The dts changes in this series depend on the DMA series [1].
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs
      commit: 4d28f38f64ef69ab27839069ef3346c3c878d137

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Re: [PATCH v3 2/3] arm64: dts: renesas: r9a09g077: wire up DMA support for SPI

[Geert Uytterhoeven]

On Wed, 28 Jan 2026 at 22:52, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> RZ/T2H (R9A09G077) has three DMA controllers that can be used by
> peripherals like SPI to offload data transfers from the CPU.
>
> Wire up the DMA channels for the SPI peripherals.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v7.1.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 3/3] arm64: dts: renesas: r9a09g087: wire up DMA support for SPI

[Geert Uytterhoeven]

On Wed, 28 Jan 2026 at 22:52, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> RZ/N2H (R9A09G087) has three DMA controllers that can be used by
> peripherals like SPI to offload data transfers from the CPU.
>
> Wire up the DMA channels for the SPI peripherals.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, will queue in renesas-devel for v7.1.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 1/3] dt-bindings: spi: renesas,rzv2h-rspi: allow multiple DMAs

[Geert Uytterhoeven]

On Wed, 28 Jan 2026 at 22:52, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> All supported SoCs have multiple DMA controllers that can be used with
> the RSPI peripheral. The current bindings only allow a single pair of RX
> and TX DMAs.
>
> The DMA core allows specifying multiple DMAs with the same name, and it
> will pick the first available one.
>
> There is an exception in the base dt-schema rules specifically for
> allowing this behavior (dtschema/schemas/dma/dma.yaml).
>
> dma-names:
>   anyOf:
>     - uniqueItems: true
>     - items:
>         # Hack around Renesas bindings which repeat entries to support
>         # multiple possible DMA providers
>         enum: [rx, tx]
>
> Allow multiple DMAs to have the same name and only restrict the possible
> names of the DMA channels, not their count.
>
> For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
> they have 3 DMA controllers.
>
> For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
> they have 5 DMA controllers.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> ---
>
> V3:
>  * impose proper maxItems for each device
>  * impose maxItems for dmas property

FTR
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds