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From: Joel Stanley <joel@jms.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: linux-spi@vger.kernel.org,
	linux-mtd <linux-mtd@lists.infradead.org>,
	Mark Brown <broonie@kernel.org>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	linux-aspeed <linux-aspeed@lists.ozlabs.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>,
	devicetree <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 06/10] spi: aspeed: Adjust direct mapping to device size
Date: Wed, 2 Mar 2022 22:31:57 +0000	[thread overview]
Message-ID: <CACPK8XcAaQWdNqEJ3f2ko0wCuAwxptkY2EncV7A2TouWzd8cWA@mail.gmail.com> (raw)
In-Reply-To: <20220302173114.927476-7-clg@kaod.org>

On Wed, 2 Mar 2022 at 17:31, Cédric Le Goater <clg@kaod.org> wrote:
>
> The segment registers of the FMC/SPI controllers provide a way to
> configure the mapping window of the flash device contents on the AHB
> bus. Adjust this window to the size of the spi-mem mapping.
>
> Things get more complex with multiple devices. The driver needs to
> also adjust the window of the next device to make sure that there is
> no overlap, even if there is no available device. The proposal below
> is not perfect but it is covering all the cases we have seen on
> different boards with one and two devices on the same bus.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  drivers/spi/spi-aspeed-smc.c | 88 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 88 insertions(+)
>
> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> index b4854b521477..974ab215ec34 100644
> --- a/drivers/spi/spi-aspeed-smc.c
> +++ b/drivers/spi/spi-aspeed-smc.c
> @@ -405,6 +405,92 @@ static int aspeed_spi_chip_set_default_window(struct aspeed_spi_chip *chip)
>         return chip->ahb_window_size ? 0 : -1;
>  }
>
> +static int aspeed_spi_set_window(struct aspeed_spi *aspi,
> +                                const struct aspeed_spi_window *win)
> +{
> +       u32 start = aspi->ahb_base_phy + win->offset;
> +       u32 end = start + win->size;
> +       void __iomem *seg_reg = aspi->regs + CE0_SEGMENT_ADDR_REG + win->cs * 4;
> +       u32 seg_val_backup = readl(seg_reg);
> +       u32 seg_val = aspi->data->segment_reg(aspi, start, end);
> +
> +       if (seg_val == seg_val_backup)
> +               return 0;
> +
> +       writel(seg_val, seg_reg);
> +
> +       /*
> +        * Restore initial value if something goes wrong else we could
> +        * loose access to the chip.
> +        */
> +       if (seg_val != readl(seg_reg)) {
> +               dev_err(aspi->dev, "CE%d invalid window [ 0x%.8x - 0x%.8x ] %dMB",
> +                       win->cs, start, end - 1, win->size >> 20);
> +               writel(seg_val_backup, seg_reg);
> +               return -EIO;
> +       }
> +
> +       if (win->size)
> +               dev_dbg(aspi->dev, "CE%d new window [ 0x%.8x - 0x%.8x ] %dMB",
> +                       win->cs, start, end - 1,  win->size >> 20);
> +       else
> +               dev_dbg(aspi->dev, "CE%d window closed", win->cs);
> +
> +       return 0;
> +}
> +
> +/*
> + * Yet to be done when possible :
> + * - Align mappings on flash size (we don't have the info)
> + * - ioremap each window, not strictly necessary since the overall window
> + *   is correct.
> + */
> +static int aspeed_spi_chip_adjust_window(struct aspeed_spi_chip *chip,
> +                                        u32 local_offset, u32 size)
> +{
> +       struct aspeed_spi *aspi = chip->aspi;
> +       struct aspeed_spi_window windows[ASPEED_SPI_MAX_NUM_CS] = { 0 };
> +       struct aspeed_spi_window *win = &windows[chip->cs];
> +       int ret;
> +
> +       aspeed_spi_get_windows(aspi, windows);
> +
> +       /* Adjust this chip window */
> +       win->offset += local_offset;
> +       win->size = size;
> +
> +       if (win->offset + win->size > aspi->ahb_window_size) {
> +               win->size = aspi->ahb_window_size - win->offset;
> +               dev_warn(aspi->dev, "CE%d window resized to %dMB", chip->cs, win->size >> 20);
> +       }
> +
> +       ret = aspeed_spi_set_window(aspi, win);
> +       if (ret)
> +               return ret;
> +
> +       /* Update chip mapping info */
> +       chip->ahb_base = aspi->ahb_base + win->offset;
> +       chip->ahb_window_size = win->size;
> +
> +       /*
> +        * Also adjust next chip window to make sure that it does not
> +        * overlap with the current window.
> +        */
> +       if (chip->cs < aspi->data->max_cs - 1) {
> +               struct aspeed_spi_window *next = &windows[chip->cs + 1];
> +
> +               /* Change offset and size to keep the same end address */
> +               if ((next->offset + next->size) > (win->offset + win->size))
> +                       next->size = (next->offset + next->size) - (win->offset + win->size);
> +               else
> +                       next->size = 0;
> +               next->offset = win->offset + win->size;
> +
> +               aspeed_spi_set_window(aspi, next);
> +       }
> +       return 0;
> +}
> +
>  static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
>  {
>         struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->master);
> @@ -419,6 +505,8 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
>         if (op->data.dir != SPI_MEM_DATA_IN)
>                 return -EOPNOTSUPP;
>
> +       aspeed_spi_chip_adjust_window(chip, desc->info.offset, desc->info.length);
> +
>         if (desc->info.length > chip->ahb_window_size)
>                 dev_warn(aspi->dev, "CE%d window (%dMB) too small for mapping",
>                          chip->cs, chip->ahb_window_size >> 20);
> --
> 2.34.1
>

  reply	other threads:[~2022-03-02 22:32 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-02 17:31 [PATCH v2 00/10] spi: spi-mem: Add driver for Aspeed SMC controllers Cédric Le Goater
2022-03-02 17:31 ` [PATCH v2 01/10] mtd: spi-nor: aspeed: Rename Kconfig option Cédric Le Goater
2022-03-02 22:16   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 02/10] ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers Cédric Le Goater
2022-03-02 22:18   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 03/10] dt-bindings: spi: Add Aspeed SMC controllers device tree binding Cédric Le Goater
2022-03-02 21:26   ` Rob Herring
2022-03-02 22:20   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 04/10] spi: spi-mem: Add driver for Aspeed SMC controllers Cédric Le Goater
2022-03-02 23:38   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 05/10] spi: aspeed: Add support for direct mapping Cédric Le Goater
2022-03-02 22:48   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 06/10] spi: aspeed: Adjust direct mapping to device size Cédric Le Goater
2022-03-02 22:31   ` Joel Stanley [this message]
2022-03-02 17:31 ` [PATCH v2 07/10] spi: aspeed: Workaround AST2500 limitations Cédric Le Goater
2022-03-02 22:30   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 08/10] spi: aspeed: Add support for the AST2400 SPI controller Cédric Le Goater
2022-03-02 22:33   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 09/10] spi: aspeed: Calibrate read timings Cédric Le Goater
2022-03-02 22:44   ` Joel Stanley
2022-03-02 17:31 ` [PATCH v2 10/10] ARM: dts: aspeed: Enable Dual SPI RX transfers Cédric Le Goater
2022-03-02 22:45   ` Joel Stanley
2022-03-02 22:48     ` Joel Stanley
2022-03-03  7:57       ` Cédric Le Goater
2022-03-03 10:01 ` [PATCH v2 00/10] spi: spi-mem: Add driver for Aspeed SMC controllers Joel Stanley
2022-03-04  7:57   ` Tao Ren

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