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From: Harini Katakam <harinikatakamlinux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
Cc: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Michal Simek
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	Soren Brinkmann
	<soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 2/2] spi: cadence: Fix 3-to-8 mux mode
Date: Fri, 28 Nov 2014 12:22:33 +0530	[thread overview]
Message-ID: <CAFcVEC+xbxMhYEhYwpd9KCd3Mesg3HQu7c+_fc1N++AexvoGOQ@mail.gmail.com> (raw)
In-Reply-To: <1417101138-2619-2-git-send-email-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>

On Thu, Nov 27, 2014 at 8:42 PM, Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org> wrote:
> In 3-to-8 mux mode for the CS pins we need to set the PERI_SEL bit in the
> control register. Currently the driver never sets this bit even when
> configured for 3-to-8 mux mode. This patch adds code which sets the bit
> during device initialization when necessary.
>
> Signed-off-by: Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>

Acked-by: Harini Katakam <harinik-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>

Regards,
Harini
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  parent reply	other threads:[~2014-11-28  6:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-27 15:12 [PATCH 1/2] spi: cadence: Init HW after reading devicetree attributes Lars-Peter Clausen
     [not found] ` <1417101138-2619-1-git-send-email-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
2014-11-27 15:12   ` [PATCH 2/2] spi: cadence: Fix 3-to-8 mux mode Lars-Peter Clausen
     [not found]     ` <1417101138-2619-2-git-send-email-lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org>
2014-11-28  6:52       ` Harini Katakam [this message]
2014-11-28  7:52   ` [PATCH 1/2] spi: cadence: Init HW after reading devicetree attributes Michal Simek
2014-11-28 11:42   ` Mark Brown

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