From: Barry Song <21cnbao-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org,
spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
w.sang-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org
Cc: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>,
workgroup.linux-kQvG35nSl+M@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Zhiwu Song <zhiwu.song-kQvG35nSl+M@public.gmane.org>
Subject: Re: [PATCH v2] SPI: add CSR SiRFprimaII SPI controller driver
Date: Wed, 14 Dec 2011 16:26:14 +0800 [thread overview]
Message-ID: <CAGsJ_4zDFWH2iVqV4_payr2TEYG5NhAuz2EbpBJn2Uq0uuJOSQ@mail.gmail.com> (raw)
In-Reply-To: <1323849835-17995-1-git-send-email-Barry.Song-kQvG35nSl+M@public.gmane.org>
2011/12/14 Barry Song <Barry.Song@csr.com>:
> From: Zhiwu Song <zhiwu.song@csr.com>
>
> CSR SiRFprimaII has two SPIs (SPI0 and SPI1). Features:
> * Master and slave modes
> * 8-/12-/16-/32-bit data unit
> * 256 bytes receive data FIFO and 256 bytes transmit data FIFO
> * Multi-unit frame
> * Configurable SPI_EN (chip select pin) active state
> * Configurable SPI_CLK polarity
> * Configurable SPI_CLK phase
> * Configurable MSB/LSB first
>
> Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>
> ---
> -v2:
> fix bundle of minor issues Wolfram Sang pointed out;
> use Wolfram Sang's new devm_request_mem_region api, refer to:
> https://lkml.org/lkml/2011/10/25/226
sorry. due to some misoperations and typos in it, pls ignore it and read
"[PATCH v2 RESEND] SPI: add CSR SiRFprimaII SPI controller driver" instead.
-barry
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prev parent reply other threads:[~2011-12-14 8:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-14 8:03 [PATCH v2] SPI: add CSR SiRFprimaII SPI controller driver Barry Song
[not found] ` <1323849835-17995-1-git-send-email-Barry.Song-kQvG35nSl+M@public.gmane.org>
2011-12-14 8:26 ` Barry Song [this message]
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