From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Mark Brown <broonie@kernel.org>,
linux-spi <linux-spi@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] spi: dw: Make DMA request line assignments explicit for Intel Medfield
Date: Fri, 29 May 2020 22:21:35 +0300 [thread overview]
Message-ID: <CAHp75VdTGU-1gOt10eUP3BM6BaSCV4MxcfOdtLs_EVUqxLELKw@mail.gmail.com> (raw)
In-Reply-To: <20200529190416.lwou54v6a3suicfd@mobilestation>
On Fri, May 29, 2020 at 10:05 PM Serge Semin <fancer.lancer@gmail.com> wrote:
> On Fri, May 29, 2020 at 09:49:55PM +0300, Andy Shevchenko wrote:
> > On Fri, May 29, 2020 at 09:40:50PM +0300, Serge Semin wrote:
> > > On Fri, May 29, 2020 at 09:31:49PM +0300, Andy Shevchenko wrote:
...
> > > You know my attitude to these changes.) But anyway what's the point in having
> > > the *tx and *rx pointers here? Without any harm to the readability you can use
> > > the structures names directly, don't you?
> >
> > I will wait for Mark to decide.
>
> So no response to a review comment? Shall I do the same when get a review from
> you?.)
This patch is result of you insisting on your version of things when I
tried to explain you that it's not how it should be done. You pushed
your vision. Mark proposed to submit your changes and consider mine
which I agreed on. I will wait for him.
> I am not asking about the whole patch purpose. You know what I think about it.
> My question was about why *tx and *rx pointers are required? Just wondering, I
> may misunderstand something... As I see it you could use dma_tx and dma_rx here
> directly with the same level of readability.
I'll consider this in case v3 will be needed, thanks.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-05-29 19:21 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 18:31 [PATCH v2 1/2] spi: dw: Make DMA request line assignments explicit for Intel Medfield Andy Shevchenko
2020-05-29 18:31 ` [PATCH v2 2/2] spi: dw: Refactor mid_spi_dma_setup() to separate DMA and IRQ config Andy Shevchenko
2020-05-29 18:40 ` [PATCH v2 1/2] spi: dw: Make DMA request line assignments explicit for Intel Medfield Serge Semin
2020-05-29 18:49 ` Andy Shevchenko
2020-05-29 19:04 ` Serge Semin
2020-05-29 19:21 ` Andy Shevchenko [this message]
2020-05-29 19:52 ` Mark Brown
2020-06-01 12:00 ` Serge Semin
2020-05-29 21:06 ` Mark Brown
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